Abstract: A port protection network provided with a joint test action group (JTAG) core and method of use. The port protection network includes an agent device operatively connected with a streaming bus and a test access port (TAP) of the JTAG core. The port protection network also includes a master device operatively connected with the streaming bus and the TAP of the JTAG core. In the port protection network, the agent device is configured to selectively restrict access to the master device through the JTAG core.

Abstract: Multi-pattern data retention testing and iterative change of measurement testing are used for the production of Known Good Dies. Multi-pattern data testing of a memory such as an SRAM comprises writing at Vdd, reduction of Vdd, restoration of Vdd, reading of the memory, and comparison of write patterns to read patterns to determine accuracy of data retention. Iterative or change of measurement testing involves repeated testing of a die to determine changes in Iddq, changes in multi-pattern data retention, or other changes in chip operating parameters. Defect activating test may be used in combination with change of measurement testing or with multi-pattern data retention testing.