Patents by Inventor Michael J. Bertram
Michael J. Bertram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160328642Abstract: The present disclosure relates to sensor signal processing using an analog neural network. In an embodiment, a sensor signal processing system comprises: an analog neural network communicatively coupled to at least one sensor and a digital processor communicatively coupled to the analog neural network. The analog neural network is configured to receive a plurality of analog signals wherein the plurality of analog signals are associated with a plurality of sensor signals output by the at least one sensor. The analog neural network also determines an analog signal of the plurality of analog signals that is indicative of an event of interest and generates an activation signal to the digital processor in response to determining an analog signal is indicative of an event of interest. The digital processor is configured to receive the activation signal and transition to a higher-power state from a lower-power state in response to the activation signal.Type: ApplicationFiled: May 6, 2016Publication date: November 10, 2016Inventors: Bryce D. Himebaugh, Gregory W. Mattes, Kenichi Yoshida, Michael J. Bertram
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Patent number: 5462217Abstract: A high force flip chip bonding method and system that precisely and forcefully engage a flip chip device with a corresponding wiring pattern on a substrate in a manner that prevents flip chip device and substrate shifting during force application. The method includes the steps of determining the centroid of the pattern formed by the interconnects on the flip chip device. The flip chip device is directed toward the substrate for contacting the corresponding wiring pattern with the interconnects and then the interconnects are compressed into the corresponding wiring pattern using a bonding force. The bonding force is directed along a neutral axis of deflection that is coincident with the centroid. Applying the bonding force along the neutral axis of deflection at the centroid minimizes lateral shifting of the flip chip device relative to the substrate to precisely bond the interconnects to the corresponding wiring pattern.Type: GrantFiled: September 15, 1994Date of Patent: October 31, 1995Assignee: Microelectronics and Computer Technology CorporationInventors: Richard L. Simmons, Michael J. Bertram
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Patent number: 5368217Abstract: A high force flip chip bonding method and system that precisely and forcefully engage a flip chip device with a corresponding wiring pattern on a substrate in a manner that prevents flip chip device and substrate shifting during force application. The method includes the steps of determining the centroid of the pattern formed by the interconnects on the flip chip device. The flip chip device is directed toward the substrate for contacting the corresponding wiring pattern with the interconnects and then the interconnects are compressed into the corresponding wiring pattern using a bonding force. The bonding force is directed along a neutral axis of deflection that is coincident with the centroid. Applying the bonding force along the neutral axis of deflection at the centroid minimizes lateral shifting of the flip chip device relative to the substrate to precisely bond the interconnects to the corresponding wiring pattern.Type: GrantFiled: August 25, 1993Date of Patent: November 29, 1994Assignee: Microelectronics and Computer Technology CorporationInventors: Richard L. Simmons, Michael J. Bertram
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Patent number: 5283946Abstract: The excise and lead form of TAB leads bonded to an integrated circuit chip. Leads extending beyond a sidewall are clamped between a first clamp and a form anvil at a first portion spaced from the chip. The leads are also clamped between an excise/form tool and a second clamp at a second portion spaced further from the chip than the first portion. An excise blade cuts the leads outside the second portion. Then the excise/form tool, second clamp and excise blade move downwards in a curved path toward the chip to form a first lead corner against the form anvil and a second lead corner against the excise/form tool without splaying or galling the leads.Type: GrantFiled: May 17, 1993Date of Patent: February 8, 1994Assignee: Microelectronics And Computer Technology CorporationInventors: Richard L. Simmons, James D. Wehrly, Jr., Michael J. Bertram
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Patent number: 5210936Abstract: The excise and lead form of TAB leads bonded to an integrated circuit chip. Leads extending beyond a sidewall are clamped between a first clamp and a form anvil at a first portion spaced from the chip. The leads are also clamped between an excise/form tool and a second clamp at a second portion spaced further from the chip than the first portion. An excise blade cuts the leads outside the second portion. Then the excise/form tool, second clamp and excise blade move downwards in a curved path toward the chip to form a first lead corner against the form anvil and a second lead corner against the excise/form tool without splaying or galling the leads.Type: GrantFiled: January 6, 1992Date of Patent: May 18, 1993Assignee: Microelectronics And Computer Technology CorporationInventors: Richard L. Simmons, James D. Wehrly, Jr., Michael J. Bertram
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Patent number: 5072874Abstract: A desoldering material with an opening or window shaped so that the base of an electronic component can fit inside the opening while the desoldering material simultaneously contacts all solder joints which bond the component's outer leads to pads on a surface. A first adhesive secures the base to the surface, a second adhesive secures a retraction device to the base, the first adhesive is heated and softened without softening the second adhesive, and the retraction device removes the desoldered component from the surface. The invention is well suited to removing tape-automated-bonded integrated circuits adhesively attached to high density multichip module substrates.Type: GrantFiled: January 31, 1991Date of Patent: December 17, 1991Assignee: Microelectronics and Computer Technology CorporationInventors: Michael J. Bertram, Daniel M. Andrews, Thomas A. Bishop
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Patent number: 4945954Abstract: A method and apparatus for aligning two mating tools is provided by a plurality of alignment members extending upward from the surface of one mating tool so that the alignment members engage in slidable contact with alignment tracks formed in the edges of the second mating tool. The alignment members and tracks can be formed in the four corners of rectangular mating tools, and the alignment members can be cylindrical rods with dome shaped tops. The alignment is useful both for tooling set-up as well as tooling usage. The alignment means can be used on a punch and lead form anvil for forming the outer leads of an integrated circuit bonded to a TAB tape.Type: GrantFiled: September 28, 1989Date of Patent: August 7, 1990Assignee: Microelectronics and Computer Technology CorporationInventors: James D. Wehrly, Jr., Michael J. Bertram
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Patent number: 4934582Abstract: A method and apparatus are described for the removal of solder mounted surface mount electronic components which includes the removal of old solder, broken leads, and the electronic component without damaging other devices on the substrate. A desoldering braid is shaped to cover each of the electronic component's outer lead bonds without contacting the component's base. The desoldering braid is heated and brought in contact with the bonds until the solder flows into the desoldering braid and any broken outer leads attach to the desoldering braid. Upon removal of the desoldering braid the electronic component can be lifted off the surface. The desoldered solder joints will contain a thin uniform coating of solder less than approximately 50 micro inches thick. This allows for removal and replacement of solder mounted electronic components with leads on center lines spaced less than 0.020 inches.Type: GrantFiled: September 20, 1989Date of Patent: June 19, 1990Assignee: Microelectronics and Computer Technology CorporationInventors: Michael J. Bertram, Daniel M. Andrews