Patents by Inventor Michael J. Gossman

Michael J. Gossman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ELECTRONIC DEVICES COMPRISING AIR GAPS ADJACENT TO BITLINES
    Publication number: 20230081678
    Abstract: An electronic device that comprises bitlines and air gaps adjacent to an array region of an electronic device is disclosed. The bitlines comprise sloped sidewalls and a height of the air gaps is greater than a height of the bitlines. Additional electronic devices are disclosed, as are methods of forming an electronic device and related systems.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 16, 2023
    Inventors: Mithun Kumar Ramasahayam, Michael J. Gossman
  • MICROELECTRONIC DEVICES INCLUDING STAIR STEP STRUCTURES, AND RELATED ELECTRONIC SYSTEMS AND METHODS
    Publication number: 20230063178
    Abstract: A microelectronic device includes a stack structure including a vertically alternating sequence of conductive structures and insulating structures arranged in tiers, a dielectric-filled opening vertically extending into the stack structure and defined between two internal sidewalls of the stack structure, a stadium structure within the stack structure and comprising steps defined by horizontal ends of at least some of the tiers, a first ledge extending upward from a first uppermost step of the steps of the stadium structure and interfacing with a first internal sidewall of the two internal sidewalls of the stack structure, and a second ledge extending upward from a second, opposite uppermost step of the steps of the stadium structure and interfacing with a second, opposite internal sidewall of the two internal sidewalls.
    Type: Application
    Filed: December 29, 2021
    Publication date: March 2, 2023
    Inventors: Bo Zhao, Matthew J. King, Jason Reece, Michael J. Gossman, Shruthi Kumara Vadivel, Martin J. Barclay, Lifang Xu, Joel D. Peterson, Matthew Park, Adam L. Olson, David A. Kewley, Xiaosong Zhang, Justin B. Dorhout, Zhen Feng Yow, Kah Sing Chooi, Tien Minh Quan Tran, Biow Hiem Ong
  • Electronic devices comprising air gaps adjacent to bitlines and related methods and systems
    Patent number: 11508421
    Abstract: An electronic device that comprises bitlines and air gaps adjacent to an array region of an electronic device is disclosed. The bitlines comprise sloped sidewalls and a height of the air gaps is greater than a height of the bitlines. Additional electronic devices are disclosed, as are methods of forming an electronic device and related systems.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: November 22, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Mithun Kumar Ramasahayam, Michael J. Gossman
  • ELECTRONIC DEVICES COMPRISING AIR GAPS ADJACENT TO BITLINES AND RELATED METHODS AND SYSTEMS
    Publication number: 20220157354
    Abstract: An electronic device that comprises bitlines and air gaps adjacent to an array region of an electronic device is disclosed. The bitlines comprise sloped sidewalls and a height of the air gaps is greater than a height of the bitlines. Additional electronic devices are disclosed, as are methods of forming an electronic device and related systems.
    Type: Application
    Filed: November 13, 2020
    Publication date: May 19, 2022
    Inventors: Mithun Kumar Ramasahayam, Michael J. Gossman
  • Integrated circuitry, memory integrated circuitry, and methods used in forming integrated circuitry
    Patent number: 11114379
    Abstract: A method used in forming integrated circuitry comprises forming a stack of vertically-alternating tiers of different composition materials. A stair-step structure is formed into the stack and an upper landing is formed adjacent and above the stair-step structure. The stair-step structure is formed to comprise vertically-alternating tiers of the different composition materials. A plurality of stairs individually comprise two of the tiers of different composition materials. At least some of the stairs individually have only two tiers that are each only of a different one of the different composition materials. An upper of the stairs that is below the upper landing comprises at least four of the tiers of different composition materials. Structure independent of method is disclosed.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: September 7, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Michael J. Gossman, M. Jared Barclay, Matthew J. King, Eldon Nelson, Matthew Park, Jason Reece, Lifang Xu, Bo Zhao
  • Integrated Circuitry, Memory Integrated Circuitry, And Methods Used In Forming Integrated Circuitry
    Publication number: 20190371728
    Abstract: A method used in forming integrated circuitry comprises forming a stack of vertically-alternating tiers of different composition materials. A stair-step structure is formed into the stack and an upper landing is formed adjacent and above the stair-step structure. The stair-step structure is formed to comprise vertically-alternating tiers of the different composition materials. A plurality of stairs individually comprise two of the tiers of different composition materials. At least some of the stairs individually have only two tiers that are each only of a different one of the different composition materials. An upper of the stairs that is below the upper landing comprises at least four of the tiers of different composition materials. Structure independent of method is disclosed.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 5, 2019
    Applicant: Micron Technology, Inc.
    Inventors: Michael J. Gossman, M. Jared Barclay, Matthew J. King, Eldon Nelson, Matthew Park, Jason Reece, Lifang Xu, Bo Zhao