Abstract: A memory sub-system includes a power management integrated circuit (PMIC) compatible with operation at an uppermost PMIC supply voltage that is lower than a primary supply voltage of the memory sub-system. The PMIC is configured to output multiple voltages for operation of the memory sub-system based on a PMIC supply voltage. The memory sub-system further includes a capacitive voltage divider (CVD) coupled to the PMIC. The CVD is configured to receive the primary supply voltage of the memory sub-system as an input and provide a modified primary supply voltage (MPSV) to the PMIC as the PMIC supply voltage, where the MPSV is not higher than the uppermost PMIC supply voltage.

Abstract: A memory sub-system includes a power management integrated circuit (PMIC) compatible with operation at an uppermost PMIC supply voltage that is lower than a primary supply voltage of the memory sub-system. The PMIC is configured to output multiple voltages for operation of the memory sub-system based on a PMIC supply voltage. The memory sub-system further includes a capacitive voltage divider (CVD) coupled to the PMIC. The CVD is configured to receive the primary supply voltage of the memory sub-system as an input and provide a modified primary supply voltage (MPSV) to the PMIC as the PMIC supply voltage, where the MPSV is not higher than the uppermost PMIC supply voltage.

Abstract: A sealant releasably seals a distal end of a tip of a tube containing a curable substance dispensable from the tip of the tube. The sealant has between about 20 N and about 60 N of penetration resistance force in a penetration resistance test, wherein the penetration resistance test comprises: (i) placing the sealant in a container at room temperature such that the sealant has a top surface defining a plane; (ii) attaching a conical probe to a force gage wherein the conical probe has a tip length of 7.5 mm, a diameter of 9 mm, and an overall length of 20 mm; (iii) moving the conical probe perpendicularly relative to the plane of top surface of the sealant; and (iv) inserting the conical probe into the sealant to an insertion depth of between 8 mm and 12 mm to generate the penetration resistance force.

Abstract: A memory sub-system includes a power management integrated circuit (PMIC) compatible with operation at an uppermost PMIC supply voltage that is lower than a primary supply voltage of the memory sub-system. The PMIC is configured to output multiple voltages for operation of the memory sub-system based on a PMIC supply voltage. The memory sub-system further includes a capacitive voltage divider (CVD) coupled to the PMIC. The CVD is configured to receive the primary supply voltage of the memory sub-system as an input and provide a modified primary supply voltage (MPSV) to the PMIC as the PMIC supply voltage, where the MPSV is not higher than the uppermost PMIC supply voltage.

Abstract: Embodiments of a method and apparatus are described to transmit a data signal from a power supply unit, over existing direct current (DC) power transmission lines, to a residential gateway which includes an infrared (IR) receiver designed to receive optical signals. In one embodiment, the IR receiver is configured to receive a carrier current communication signal from the power supply unit over a pair of copper wires coupled to the IR receiver. The carrier current communication signals may be encoded by a transmission encoding logic circuit using pulse position modulation techniques. The received carrier current communication signals may be demodulated and decoded to reproduce an input data stream.

Abstract: Embodiments of a method and apparatus are described to transmit a data signal from a power supply unit, over existing direct current (DC) power transmission lines, to a residential gateway which includes an infrared (IR) receiver designed to receive optical signals. In one embodiment, the IR receiver is configured to receive a carrier current communication signal from the power supply unit over a pair of copper wires coupled to the IR receiver. The carrier current communication signals may be encoded by a transmission encoding logic circuit using pulse position modulation techniques. The received carrier current communication signals may be demodulated and decoded to reproduce an input data stream.

Abstract: Embodiments of a method and apparatus are described to transmit a data signal from a power supply unit, over existing direct current (DC) power transmission lines, to a residential gateway which includes an infrared (IR) receiver designed to receive optical signals. In one embodiment, the IR receiver is configured to receive a carrier current communication signal from the power supply unit over a pair of copper wires coupled to the IR receiver. The carrier current communication signals may be encoded by a transmission encoding logic circuit using pulse position modulation techniques. The received carrier current communication signals may be demodulated and decoded to reproduce an input data stream.

Abstract: Embodiments of a method and apparatus are described to transmit a data signal from a power supply unit, over existing direct current (DC) power transmission lines, to a residential gateway which includes an infrared (IR) receiver designed to receive optical signals. In one embodiment, the IR receiver is configured to receive a carrier current communication signal from the power supply unit over a pair of copper wires coupled to the IR receiver. The carrier current communication signals may be encoded by a transmission encoding logic circuit using pulse position modulation techniques. The received carrier current communication signals may be demodulated and decoded to reproduce an input data stream.

Abstract: A carburetor air intake velocity stack engagable with a carburetor inlet, has a cylindrical throat section having first and second ends. The first end is adapted to be coupled to the carburetor, while the second end is open to the air. A shaped, mesh filter having an effective open area which exceeds the open area of the velocity stack by at least about 50%, is located within said air intake velocity stack. The filter has a cylindrically formed flange member which is trapped between said air intake velocity stack and the carburetor.

Abstract: A non-linear slew rate limiter for a digital signal compares the digital signal with a reference waveform that has a frequency spectrum that slightly exceeds the passband of a reconstruction filter within a digital to analog converter. Samples of the digital signal are compared with immediately prior samples of an output digital signal to determine the polarity of the slewing of the digital signal, and also are compared with corresponding next samples of the reference waveform to determine whether the slew rate of the digital signal exceeds the slew rate of the reference waveform. If the slew rate of the digital signal exceeds the slew rate of the reference waveform, the sample of the reference waveform replaces the corresponding sample of the digital signal in the output digital signal. Otherwise the sample of the digital signal becomes the output digital signal.