Patents by Inventor Michael J. Leeson
Michael J. Leeson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10692757Abstract: Embodiments of the invention include photoresist materials and methods of patterning photoresist materials. In an embodiment a photoresist material comprises a plurality of molecular glasses (MGs). In an embodiment, a glass transition temperature Tg of the photoresist material is less than an activation temperature needed to deblock blocking groups from the MGs. Embodiments include a method of patterning a photoresist material that comprises exposing the photoresist material with ultraviolet radiation. The method may also comprise, performing a first post exposure bake at a first temperature, that is less than the activation temperature needed to deblock blocking groups from the MGs, and performing a second post exposure bake at a second temperature that is approximately equal to or greater than the activation temperature needed to deblock blocking groups from the MGs.Type: GrantFiled: May 28, 2015Date of Patent: June 23, 2020Assignee: Intel CorporationInventors: Marie Krysak, Robert Lindsey Bristol, Paul Anton Nyhus, Michael J. Leeson
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Patent number: 10269622Abstract: Embodiments of the invention include microelectronic devices and methods of forming such devices. In an embodiment, a microelectronic device, includes one or more pre-patterned features formed into a interconnect layer, with a conformal barrier layer formed over the first wall, and the second wall of one or more of the pre-patterned features. A photoresist layer may formed over the barrier layer and within one or more of the pre-patterned features and a conductive via may be formed in at least one of the pre-patterned features.Type: GrantFiled: December 24, 2014Date of Patent: April 23, 2019Assignee: Intel CorporationInventors: Rami Hourani, Michael J. Leeson, Todd R. Younkin, Eungnak Han, Robert L. Bristol
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Publication number: 20180102282Abstract: Embodiments of the invention include photoresist materials and methods of patterning photoresist materials. In an embodiment a photoresist material comprises a plurality of molecular glasses (MGs). In an embodiment, a glass transition temperature Tg of the photoresist material is less than an activation temperature needed to deblock blocking groups from the MGs. Embodiments include a method of patterning a photoresist material that comprises exposing the photoresist material with ultraviolet radiation. The method may also comprise, performing a first post exposure bake at a first temperature, that is less than the activation temperature needed to deblock blocking groups from the MGs, and performing a second post exposure bake at a second temperature that is approximately equal to or greater than the activation temperature needed to deblock blocking groups from the MGs.Type: ApplicationFiled: May 28, 2015Publication date: April 12, 2018Inventors: Marie KRYSAK, Robert Lindsey BRISTOL, Paul Anton NYHUS, Michael J. LEESON
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Publication number: 20170345643Abstract: Photodefinable alignment layers for chemical assisted patterning and approaches for forming photodefinable alignment layers for chemical assisted patterning are described. An embodiment of the invention may include disposing a chemically amplified resist (CAR) material over a hardmask that includes a switch component. The CAR material may then be exposed to form exposed resist portions. The exposure may produces acid in the exposed portions of the CAR material that interact with the switch component to form modified regions of the hardmask material below the exposed resist portions.Type: ApplicationFiled: December 24, 2014Publication date: November 30, 2017Inventors: Todd R. YOUNKIN, Michael J. LEESON, James M. BLACKWELL, Ernisse S. PUTNA, Marie KRYSAK, Rami HOURANI, Eungnak HAN, Robert L. BRISTOL
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Publication number: 20170263496Abstract: Embodiments of the invention include microelectronic devices and methods of forming such devices. In an embodiment, a microelectronic device, includes one or more pre-patterned features formed into a interconnect layer, with a conformal barrier layer formed over the first wall, and the second wall of one or more of the pre-patterned features. A photoresist layer may formed over the barrier layer and within one or more of the pre-patterned features and a conductive via may be formed in at least one of the pre-patterned features.Type: ApplicationFiled: December 24, 2014Publication date: September 14, 2017Inventors: RAMI HOURANI, MICHAEL J. LEESON, TODD R. YOUNKIN, EUNGNAK HAN, ROBERT L. BRISTOL
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Patent number: 7800203Abstract: According to one aspect of the invention, a method of constructing a memory array is provided. An insulating layer is formed on a semiconductor wafer. A first metal stack is then formed on the insulating layer and etched to form first metal lines. A polymeric layer is formed over the first metal lines and the insulating layer. A puddle of smoothing solvent is then allowed to stand on the wafer. The smoothing solvent is then removed. After the smoothing solvent is removed, the polymeric layer has a reduced surface roughness. A second metal stack is then formed on the polymeric layer and etched to form second metal lines.Type: GrantFiled: June 27, 2008Date of Patent: September 21, 2010Assignee: Intel CorporationInventors: Michael J. Leeson, Ebrahim Andideh
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Publication number: 20080284034Abstract: According to one aspect of the invention, a method of constructing a memory array is provided. An insulating layer is formed on a semiconductor wafer. A first metal stack is then formed on the insulating layer and etched to form first metal lines. A polymeric layer is formed over the first metal lines and the insulating layer. A puddle of smoothing solvent is then allowed to stand on the wafer. The smoothing solvent is then removed. After the smoothing solvent is removed, the polymeric layer has a reduced surface roughness. A second metal stack is then formed on the polymeric layer and etched to form second metal lines.Type: ApplicationFiled: June 27, 2008Publication date: November 20, 2008Inventors: Michael J. Leeson, Ebrahim Andideh
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Patent number: 7427559Abstract: According to one aspect of the invention, a method of constructing a memory array is provided. An insulating layer is formed on a semiconductor wafer. A first metal stack is then formed on the insulating layer and etched to form first metal lines. A polymeric layer is formed over the first metal lines and the insulating layer. A puddle of smoothing solvent is then allowed to stand on the wafer. The smoothing solvent is then removed. After the smoothing solvent is removed, the polymeric layer has a reduced surface roughness. A second metal stack is then formed on the polymeric layer and etched to form second metal lines.Type: GrantFiled: November 27, 2006Date of Patent: September 23, 2008Assignee: Intel CorporationInventors: Michael J. Leeson, Ebrahim Andideh
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Publication number: 20080076058Abstract: A photoresist composition (phosphoresist) including a resist capable of activation when exposed to electromagnetic energy within a first bandwidth, but relatively insensitive to electromagnetic energy within a second bandwidth and a third bandwidth, and also including a phosphor material included in the photoresist and capable of activation when exposed to electromagnetic energy within the second bandwidth. Photo-luminescent centers included in the phosphoresist are associated with the phosphor material and are capable of emitting luminescence within the first bandwidth in response to exposure to electromagnetic energy within the third bandwidth. The phosphoresist may be disposed as a relatively thin and uniform layer at a surface of a substrate, such as a semiconductor substrate.Type: ApplicationFiled: August 11, 2006Publication date: March 27, 2008Inventors: Michael J. Leeson, Heidi B. Cao, Wang Yueh, Jeanette M. Roberts
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Patent number: 7241707Abstract: Multiple-layer films in integrated circuit processing may be formed by the phase segregation of a single composition formed above a semiconductor substrate. The composition is then induced to phase segregate into at least a first continuous phase and a second continuous phase. The composition may be formed of two or more components that phase segregate into different continuous layers. The composition may also be a single component that breaks down upon activation into two or more components that phase segregate into different continuous layers. Phase segregation may be used to form, for example, a sacrificial light absorbing material (SLAM) and a developer resistant skin, a dielectric layer and a hard mask, a photoresist and an anti-reflective coating (ARC), a stress buffer coating and a protective layer on a substrate package, and light interference layers.Type: GrantFiled: February 17, 2005Date of Patent: July 10, 2007Assignee: Intel CorporationInventors: Robert P. Meagley, Michael J. Leeson, Michael D. Goodner, Bob E. Leet, Michael L. McSwiney, Shan C. Clark
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Patent number: 7169620Abstract: According to one aspect of the invention, a method of constructing a memory array is provided. An insulating layer is formed on a semiconductor wafer. A first metal stack is then formed on the insulating layer and etched to form first metal lines. A polymeric layer is formed over the first metal lines and the insulating layer. A puddle of smoothing solvent is then allowed to stand on the wafer. The smoothing solvent is then removed. After the smoothing solvent is removed, the polymeric layer has a reduced surface roughness. A second metal stack is then formed on the polymeric layer and etched to form second metal lines.Type: GrantFiled: September 30, 2003Date of Patent: January 30, 2007Assignee: Intel CorporationInventors: Michael J. Leeson, Ebrahim Andideh
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Patent number: 6991893Abstract: Photoresists may be formed over a structure that has been modified so as to poison a lower layer of the photoresist. Then, when the photoresist is patterned, it is only patterned down to the poisoned layer. The poisoned layer may be removed subsequently. However, because of the use of the modification process, the critical dimensions of the photoresist may be improved in some embodiments.Type: GrantFiled: October 31, 2002Date of Patent: January 31, 2006Assignee: Intel CorporationInventors: Michael D. Goodner, Robert P. Meagley, Michael J. Leeson
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Publication number: 20040102054Abstract: Briefly, in accordance with one embodiment of the invention, an edge bead removal process is performed during the manufacture of a ferroelectric memory device while a polymer solution is still wet.Type: ApplicationFiled: November 25, 2002Publication date: May 27, 2004Inventors: Michael J. Leeson, Ebrahim Andideh
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Publication number: 20040086809Abstract: Photoresists may be formed over a structure that has been modified so as to poison a lower layer of the photoresist. Then, when the photoresist is patterned, it is only patterned down to the poisoned layer. The poisoned layer may be removed subsequently. However, because of the use of the modification process, the critical dimensions of the photoresist may be improved in some embodiments.Type: ApplicationFiled: October 31, 2002Publication date: May 6, 2004Inventors: Michael D. Goodner, Robert P. Meagley, Michael J. Leeson
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Patent number: 5654531Abstract: An elevator system comprises a plurality of cars, and a group controller. A pair of multidrop communication links are connected with the cars such that, absent a communication break, a datagram transmitted by any car controller onto either link may be received by any or all of the remaining car controllers. Each car controller includes means for designating a primary link for each of the remaining cars, and means for rebroadcasting datagrams intended for another car on the primary link only when the datagram is received on a link other than the primary link.Preferably, each controller includes a means to determine when communications with another car, over the primary link, have been disrupted, and to switch the designation of primary link accordingly. In the preferred embodiment, a timer means is associated with each car, which is reset each time the car receives a datagram originating from that car.Type: GrantFiled: August 7, 1995Date of Patent: August 5, 1997Assignee: Delaware Capital Formation, Inc.Inventors: Larry A. Farabee, Michael J. Leeson