Patents by Inventor Michael J. Ludowise

Michael J. Ludowise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020047131
    Abstract: The present invention enhances the light extraction from the topside of the LED by an appropriate choice of the spacing from the active region to the reflective ohmic contact. Proper selection of the spacing from the active region to the reflective contact causes the interference pattern of upwardly-directed light to concentrate light within the escape cone for emission. Appropriate spacings are shown to be approximately &lgr;n/4, and to lie in the ranges 2.3 &lgr;n/4≦d≦3.1 &lgr;n/4 (favorably ≈2.6 &lgr;n/4), and 4.0 &lgr;n/4≦d≦4.9 &lgr;n/4 (favorably ≈4.5 &lgr;n/4). Extraction of light is thereby enhanced.
    Type: Application
    Filed: October 11, 2001
    Publication date: April 25, 2002
    Inventors: Michael J. Ludowise, Yu-Chen Shen, Michael R. Krames
  • Patent number: 6287947
    Abstract: A method of forming a light-transmissive contact on a p-type Gallium nitride (GaN) layer of an optoelectronic device includes in one embodiment, introducing a selected metal in an oxidized condition, rather than oxidizing the metal only after it has been deposited on the surface of the p-type GaN layer. In some applications, the oxidized metal provides sufficient lateral conductivity to eliminate the conventional requirement of a second highly conductive contact metal, such as gold. If the second contact metal is desired, an anneal in an oxygen-free environment is performed after deposition of the second layer. The anneal causes the second metal to penetrate the oxidized metal and to fuse to the surface of the p-type GaN layer. In a second embodiment, the oxidation occurs only after at least one of the two metals is deposited on the surface of the p-type GaN layer.
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: September 11, 2001
    Assignee: LumiLeds Lighting, U.S. LLC
    Inventors: Michael J. Ludowise, Steven A. Maranowski, Daniel A. Steigerwald, Jonathan Joseph Wierer, Jr.
  • Publication number: 20010006852
    Abstract: A method for growing a crystalline layer that includes a first material on a growth surface of a crystalline substrate of a second material, wherein the first material and the second material have different lattice constants. A buried layer is generated in the substrate such that the buried layer isolates a layer of the substrate that includes the growth surface from the remainder of the substrate. The second material is then deposited on the growth surface at a growth temperature. The isolated layer of the substrate has a thickness that is less than the thickness at which defects are caused in the crystalline lattice of the first material by the second material crystallizing thereon. The buried layer is sufficiently malleable at the growth temperature to allow the deformation of the lattice of the isolated layer without deforming the remainder of the substrate. The present invention may be utilized for growing III-V semiconducting material layers on silicon substrates.
    Type: Application
    Filed: January 29, 2001
    Publication date: July 5, 2001
    Inventors: Yong Chen, Scott W. Corzine, Theodore I. Kamins, Michael J. Ludowise, Pierre H. Mertz, Shih-Yuan Wang
  • Patent number: 6211095
    Abstract: A method for growing a crystalline layer that includes a first material on a growth surface of a crystalline substrate of a second material, wherein the first material and the second material have different lattice constants. A buried layer is generated in the substrate such that the buried layer isolates a layer of the substrate that includes the growth surface from the remainder of the substrate. The first material is then deposited on the growth surface at a growth temperature. The isolated layer of the substrate has a thickness that is less than the thickness at which defects are caused in the crystalline lattice of the second material by the first material crystallizing thereon. The buried layer is sufficiently malleable at the growth temperature to allow the deformation of the lattice of the isolated layer without deforming the remainder of the substrate. The present invention may be utilized for growing III-V semiconducting material layers on silicon substrates.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: April 3, 2001
    Assignee: Agilent Technologies, Inc.
    Inventors: Yong Chen, Scott W. Corzine, Theodore I. Kamins, Michael J. Ludowise, Pierre H. Mertz, Shih-Yuan Wang
  • Patent number: 4575576
    Abstract: A photovoltaic solar cell is formed in a monolithic semiconductor. The cell contains three junctions. In sequence from the light-entering face, the junctions have a high, a medium, and a low energy gap. The lower junctions are connected in series by one or more metallic members connecting the top of the lower junction through apertures to the bottom of the middle junction. The upper junction is connected in voltage opposition to the lower and middle junctions by second metallic electrodes deposited in holes 60 through the upper junction. The second electrodes are connected to an external terminal.
    Type: Grant
    Filed: November 7, 1984
    Date of Patent: March 11, 1986
    Assignee: The United States of America as represented by the United States Department of Energy
    Inventor: Michael J. Ludowise