Abstract: A system (100) for reconfiguring a remote device (102) (e.g., a client device) that includes at least one processor (200) and reconfigurable logic (202) that is operatively coupled to the processor (200), employs for example, a network element that serves as a remote profile server (104) for the remote device (102). The remote device (102) includes an application profiler (206) that produces application runtime profile statistic information (120) during runtime of an application running on at least one processor (200) of the device. The remote profile server (104) includes a profile analyzer (130) that analyzes the received application runtime profile statistic information (120) to determine suitable reconfigurable logic configuration information (122) and corresponding application patch information (124) for the remote device (102).

Abstract: A system (100) for reconfiguring a remote device (102) (e.g., a client device) that includes at least one processor (200) and reconfigurable logic (202) that is operatively coupled to the processor (200), employs for example, a network element that serves as a remote profile server (104) for the remote device (102). The remote device (102) includes an application profiler (206) that produces application runtime profile statistic information (120) during runtime of an application running on at least one processor (200) of the device. The remote profile server (104) includes a profile analyzer (130) that analyzes the received application runtime profile statistic information (120) to determine suitable reconfigurable logic configuration information (122) and corresponding application patch information (124) for the remote device (102).

Abstract: A cryptographic apparatus for encrypting and decrypting digital words includes a mechanism that permits a cipher algorithm to be electronically stored after the manufacture of the apparatus. The storing mechanism includes at least one electrically erasable, programmable gate array containing a portion of the cipher algorithm and at least one random access memory device coupled to the array for storing digital data generated by the algorithm. A mechanism which is coupled to the gate array and memory device controls the execution of the algorithm for each digital word thereby decrypting encrypted digital words and encrypting non-encrypted digital words.

Abstract: A demodulator is described for demodulating phase-encoded data signals transmitted on a noisy communication channel, such as, for example, radio communication channels of a radio communication system. The demodulator includes a digital phase-locked loop for phase-locking to the mid-bit transitions of the phase-encoded data signal, which, in the preferred embodiment is encoded according to the well known Manchester coding format, and further includes demodulating circuitry for sampling the phase-encoded data signal a predetermind number of times, weighting the samples according to predetermined weighting factors, totalizing the weighted samples for each bit interval and comparing the totalized samples to a predetermined threshold value for ascertaining the logical state of each bit of the phase-encoded data signal.

Abstract: A field-effect transistor serial inverter circuit is disclosed. Capacitive coupling is provided between the control electrode of a first inverter and the control electrode of a load transistor in a serially connected second inverter. The capacitor thereby couples the input to the load transistor of the second inverter, significantly reducing the transition delay time associated with the two series inverters, and also increasing the voltage level available at the output of the second inverter to substantially the same level as the supply voltage.