Abstract: A method and system for analyzing transaction level simulation data of an integrated circuit design. In an embodiment, a transaction fiber is plotted. The transaction fiber comprises a transaction block. A compact representation of a child block of the transaction block is provided when the transaction fiber is in a collapsed state. In one embodiment, the compact representation of the child block is provided by drawing a line segment below the transaction fiber.

Abstract: A voltage clamping circuit is provided which includes first condutivity type and second conductivity type transistors serially arranged between first and second reference potential terminals. First control means including a first inverter are connected from the common point between the transistors to a control electrode of the first conductivity type transistor, and second control means including a second inverter are connected from the common point between the two transistors to a control electrode of the second conductivity type transistor, with the first and second inverters having different switching points.