Patents by Inventor Michael J. Norris

Michael J. Norris has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144533
    Abstract: Various implementations disclosed herein include devices, systems, and methods that track a movement of an input device. For example, an example process may include determine a pose of a tracking device in a physical environment based on first sensor data from an image sensor. The process then may receive, from the tracking device, first positional data corresponding to a first relative positioning between the tracking device and an input device in the physical environment, where the first positional data is determined based on second sensor data obtained via a sensor on the tracking device. The process then may track movement of the input device in the physical environment based at least in part on the first positional data and the pose of the tracking device. The process then may determine an input for the electronic device based at least in part on tracking the movement of the input device.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Inventors: Jeffrey S. Norris, Michael J. Rockwell, Tony Kobayashi, William D. Lindmeier
  • Publication number: 20240129503
    Abstract: Described herein is a data processing system having a multisample antialiasing compressor coupled to a texture unit and shader execution array. In one embodiment, the data processing system includes a memory device to store a multisample render target, the multisample render target to store color data for a set of sample locations of each pixel in a set of pixels; and general-purpose graphics processor comprising a multisample antialiasing compressor to apply multisample antialiasing compression to color data generated for the set of sample locations of a first pixel in the set of pixels and a multisample render cache to store color data generated for the set of sample locations of the first pixel in the set of pixels, wherein color data evicted from the multisample render cache is to be stored to the multisample render target.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 18, 2024
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Michael J. Norris, Eric G. Liskay
  • Patent number: 11961179
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform multi-rate shading via coarse pixel shading and output shaded coarse pixels for processing by a post-shader pixel processing pipeline.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: April 16, 2024
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Patent number: 11856213
    Abstract: Described herein is a data processing system having a multisample antialiasing compressor coupled to a texture unit and shader execution array. In one embodiment, the data processing system includes a memory device to store a multisample render target, the multisample render target to store color data for a set of sample locations of each pixel in a set of pixels; and general-purpose graphics processor comprising a multisample antialiasing compressor to apply multisample antialiasing compression to color data generated for the set of sample locations of a first pixel in the set of pixels and a multisample render cache to store color data generated for the set of sample locations of the first pixel in the set of pixels, wherein color data evicted from the multisample render cache is to be stored to the multisample render target.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: December 26, 2023
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Michael J. Norris, Eric G. Liskay
  • Publication number: 20230386130
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform multi-rate shading via coarse pixel shading and output shaded coarse pixels for processing by a post-shader pixel processing pipeline.
    Type: Application
    Filed: April 24, 2023
    Publication date: November 30, 2023
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Patent number: 11670044
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from a pixel processing pipeline.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: June 6, 2023
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Publication number: 20230123644
    Abstract: One embodiment provides a graphics processor comprising an interface to a system interconnect and a graphics processor coupled to the interface, the graphics processor comprising circuitry configured to compact sample data for multiple sample locations of a pixel, map the multiple sample locations to memory locations that store compacted sample data, the memory locations in a memory of the graphics processor, apply lossless compression to the compacted sample data, and update a compression control surface associated with the memory locations, the compression control surface to specify a compression status for the memory locations
    Type: Application
    Filed: October 6, 2022
    Publication date: April 20, 2023
    Applicant: Intel Corporation
    Inventors: Abhishek R. Appu, Prasoonkumar Surti, Joydeep Ray, Michael J. Norris
  • Publication number: 20230007285
    Abstract: Described herein is a data processing system having a multisample antialiasing compressor coupled to a texture unit and shader execution array. In one embodiment, the data processing system includes a memory device to store a multisample render target, the multisample render target to store color data for a set of sample locations of each pixel in a set of pixels; and general-purpose graphics processor comprising a multisample antialiasing compressor to apply multisample antialiasing compression to color data generated for the set of sample locations of a first pixel in the set of pixels and a multisample render cache to store color data generated for the set of sample locations of the first pixel in the set of pixels, wherein color data evicted from the multisample render cache is to be stored to the multisample render target.
    Type: Application
    Filed: July 12, 2022
    Publication date: January 5, 2023
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Michael J. Norris, Eric G. Liskay
  • Publication number: 20220327772
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from a pixel processing pipeline.
    Type: Application
    Filed: April 18, 2022
    Publication date: October 13, 2022
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Patent number: 11468621
    Abstract: One embodiment provides for a data processing system comprising a memory module to store a multisample render target, the multisample render target to store multiple sample locations for each pixel in a set of pixels and a general-purpose graphics processor including a hardware graphics rendering pipeline to generate pixel color data to be output to the multisample render target, a multisample antialiasing compressor to request allocation of one or more planes to store color data for a set of sample locations of a pixel in the set of pixels, and a memory allocator to allocate memory to store color data associated with the multisample render target. The memory allocator can merge a memory allocation for multiple pixels having a sample associated with a same color value.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: October 11, 2022
    Assignee: Intel Corporation
    Inventors: Abhishek R. Appu, Prasoonkumar Surti, Joydeep Ray, Michael J. Norris
  • Patent number: 11399194
    Abstract: Described herein is an apparatus having color compression circuitry coupled to a texture unit and shader execution array. The color compression circuitry performs lossless delta color compression of pixel color data provided by the shader execution array and texture unit to generate compressed color data. The compressed color data is stored at one or more levels of a multilevel cache subsystem.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: July 26, 2022
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Michael J. Norris, Eric G. Liskay
  • Patent number: 11315311
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from pixel processing pipeline.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: April 26, 2022
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Publication number: 20210258592
    Abstract: Described herein is an apparatus having color compression circuitry coupled to a texture unit and shader execution array. The color compression circuitry performs lossless delta color compression of pixel color data provided by the shader execution array and texture unit to generate compressed color data.
    Type: Application
    Filed: April 12, 2021
    Publication date: August 19, 2021
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Michael J. Norris, Eric G. Liskay
  • Patent number: 11006138
    Abstract: Described herein is a data processing system comprising a memory device to store a multisample render target and a general-purpose graphics processor comprising a multisample antialiasing compressor and a multisample render cache. The multisample render target can store color data for a set of sample locations of each pixel in a set of pixels. The multisample antialiasing compressor can apply multisample antialiasing compression to color data generated for the set of sample locations of a first pixel in the set of pixels. The multisample render cache can store color data generated for the set of sample locations of the first pixel in the set of pixels. Color data evicted from the multisample render cache is stored to the multisample render target.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: May 11, 2021
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Michael J. Norris, Eric G. Liskay
  • Publication number: 20210042983
    Abstract: One embodiment provides for a data processing system comprising a memory module to store a multisample render target, the multisample render target to store multiple sample locations for each pixel in a set of pixels and a general-purpose graphics processor including a hardware graphics rendering pipeline to generate pixel color data to be output to the multisample render target, a multisample antialiasing compressor to request allocation of one or more planes to store color data for a set of sample locations of a pixel in the set of pixels, and a memory allocator to allocate memory to store color data associated with the multisample render target. The memory allocator can merge a memory allocation for multiple pixels having a sample associated with a same color value.
    Type: Application
    Filed: October 13, 2020
    Publication date: February 11, 2021
    Applicant: Intel Corporation
    Inventors: Abhishek R. Appu, Prasoonkumar Surti, Joydeep Ray, Michael J. Norris
  • Publication number: 20200410749
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from pixel processing pipeline.
    Type: Application
    Filed: July 7, 2020
    Publication date: December 31, 2020
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Patent number: 10803650
    Abstract: One embodiment provides for a general-purpose graphics processor comprising a hardware graphics rendering pipeline configured to perform multisample anti-aliasing, the hardware graphics rendering pipeline including a pixel processing unit configured to generate pixel color data in a graphics processing pipeline, the pixel processing unit to output color data to a multisample render target, the multisample render target to store multiple sample locations for each pixel in a set of pixels. The general-purpose graphics processor further comprises a memory allocator to allocate memory to store color data associated with the multisample render target, the memory allocator to merge a memory allocation for multiple pixels having a sample associated with a same color value.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: October 13, 2020
    Assignee: Intel Corporation
    Inventors: Abhishek R. Appu, Prasoonkumar Surti, Joydeep Ray, Michael J. Norris
  • Patent number: 10706616
    Abstract: One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from pixel processing pipeline.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: July 7, 2020
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
  • Publication number: 20200068211
    Abstract: Described herein is a data processing system comprising a memory device to store a multisample render target and a general-purpose graphics processor comprising a multisample antialiasing compressor and a multisample render cache. The multisample render target can store color data for a set of sample locations of each pixel in a set of pixels. The multisample antialiasing compressor can apply multisample antialiasing compression to color data generated for the set of sample locations of a first pixel in the set of pixels. The multisample render cache can store color data generated for the set of sample locations of the first pixel in the set of pixels. Color data evicted from the multisample render cache is stored to the multisample render target.
    Type: Application
    Filed: October 23, 2019
    Publication date: February 27, 2020
    Applicant: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Michael J. Norris, Eric G. Liskay
  • Patent number: 10499073
    Abstract: One embodiment provides for a general-purpose graphics processor comprising a multisample antialiasing compression module to perform planar multi-sample anti-aliasing, the multisample antialiasing compression module to analyze color data for a set of sample locations of a first pixel; determine a first plane to allocate for the first pixel, wherein the first plane is a lowest order plane to be allocated for the first pixel; and merge a plane allocation for the first pixel with a plane allocation for a second pixel in response to a determination that the first plane is the lowest order plane to be allocated for the second pixel.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: December 3, 2019
    Assignee: Intel Corporation
    Inventors: Prasoonkumar Surti, Abhishek R. Appu, Michael J. Norris, Eric G. Liskay