Patents by Inventor Michael J. Palmer
Michael J. Palmer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11958849Abstract: Disclosed herein are compounds and compositions useful in the treatment of GLS1 mediated diseases, such as cancer, having the structure of Formula I: Methods of inhibition GLS1 activity in a human or animal subject are also provided.Type: GrantFiled: April 25, 2022Date of Patent: April 16, 2024Assignee: Board of Regents, The University of Texas SystemInventors: Maria Emilia Di Francesco, Philip Jones, Timothy Heffernan, Matthew M. Hamilton, Zhijun Kang, Michael J. Soth, Jason P. Burke, Kang Le, Christopher Lawrence Carroll, Wylie S. Palmer, Richard Lewis, Timothy McAfoos, Barbara Czako, Gang Liu, Jay Theroff, Zachary Herrera, Anne Yau
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Publication number: 20240115302Abstract: Compression devices for joining tissue and methods for using and fabricating the same.Type: ApplicationFiled: December 20, 2023Publication date: April 11, 2024Applicant: ActivOrtho, Inc.Inventors: Alex Peterson, Daniel S. Savage, Paul J. Hindrichs, Andrew K. Palmer, Michael P. Brenzel, William F. Ogilvie
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Publication number: 20220373614Abstract: Systems and methods for direct heater diagnostics for a hot melt liquid dispensing system are disclosed. At least one of a current measurement or a voltage measurement is received from a respective current and/or voltage sensor positioned at an electrical circuit that supplies electric power to a heater associated with the dispensing system. The heater can be for an applicator or heated hose attached to the dispensing system, a melter of the dispensing system, or a pump of the dispensing system. A state of the electrical circuit is determined based on the at least one of the current or voltage measurement.Type: ApplicationFiled: September 16, 2020Publication date: November 24, 2022Inventors: Peter W. ESTELLE, Michael J. PALMER
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Publication number: 20220326675Abstract: A flexible map with application data identifiers for PLC communications is described. An example method comprises receiving a first user input indicative of a selection of a parameter from a plurality of parameters associated with an adhesive dispensing system (614). The parameter is subject to data exchange between a controller (616) of the adhesive dispensing system (614) and an associated programmable logic controller (610). A second user input is received that is indicative of a memory space location in a memory space of the controller (616). A custom data map is generated that is indicative of an association between the selected parameter and the memory space location.Type: ApplicationFiled: September 9, 2020Publication date: October 13, 2022Inventors: Wei WANG, Michael J. PALMER, Daniel B. THOMPSON, Andreas EHLERS
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Patent number: 11163706Abstract: A method for improving performance of a host bus adapter in a data storage system is disclosed. In one embodiment, such a method uses, as an interface to a memory controller contained within a host bus adapter, multiple two-way ports configured to operate in parallel. The method uses, within each two-way port, a read FIFO buffer for transferring read data across the two-way port and a write FIFO buffer for transferring write data across the two-way port. The method also uses the read FIFO buffer and the write FIFO buffer within each two-way port to provide speed-matching for different clock speeds that operate on opposite sides of the two-way port. A corresponding system and computer program product are also disclosed.Type: GrantFiled: October 22, 2019Date of Patent: November 2, 2021Assignee: International Business Machines CorporationInventors: Bitwoded Okbay, Michael J. Palmer, Jianwei Zhuang, Ailoan Tran
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Patent number: 11023400Abstract: A method for improving performance of a direct memory access (DMA) transfer is disclosed. The method generates a descriptor that describes parameters of a DMA transfer to be performed by a DMA engine, such as a DMA engine within a host bus adapter of a data storage system. The method provides, in the descriptor, a field that describes an operation to be performed by the DMA engine. The field has as options an echo read operation, a dual write operation, a loop DDs operation, and a normal DMA transfer operation. The method provides the descriptor to the DMA engine. The DMA engine extracts the operation from the field and performs the operation. This operation may, in certain embodiments, move data through a host bus adapter of a data storage system. A corresponding system and computer program product are also disclosed.Type: GrantFiled: January 20, 2020Date of Patent: June 1, 2021Assignee: International Business Machines CorporationInventors: Jianwei Zhuang, Michael J. Palmer, Bitwoded Okbay, Ailoan Tran
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Publication number: 20210117348Abstract: A method for improving performance of a host bus adapter in a data storage system is disclosed. In one embodiment, such a method uses, as an interface to a memory controller contained within a host bus adapter, multiple two-way ports configured to operate in parallel. The method uses, within each two-way port, a read FIFO buffer for transferring read data across the two-way port and a write FIFO buffer for transferring write data across the two-way port. The method also uses the read FIFO buffer and the write FIFO buffer within each two-way port to provide speed-matching for different clock speeds that operate on opposite sides of the two-way port. A corresponding system and computer program product are also disclosed.Type: ApplicationFiled: October 22, 2019Publication date: April 22, 2021Applicant: International Business Machines CorporationInventors: Bitwoded Okbay, Michael J. Palmer, Jianwei Zhuang, Ailoan Tran
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Patent number: 10169140Abstract: A mechanism is provided for loading a phase-locked loop (PLL) configuration into a PLL module using Flash memory. A Flash data image configuration from the Flash memory is loaded into a set of holding registers in response to the PLL module locking a current PLL configuration from a set of current configuration registers. The Flash data image configuration in the set of holding registers is compared to the current PLL configuration in the set of current configuration registers in response to the Flash data image configuration failing to be corrupted. The Flash data image configuration onto a PLL module input in response to the Flash data image configuration differing from the current PLL configuration. The Flash data image configuration is loaded in the set of holding registers into the set of current configuration registers in response to the PLL module locking the Flash data image configuration.Type: GrantFiled: October 18, 2016Date of Patent: January 1, 2019Assignee: International Business Machines CorporationInventors: Gerald M. Grabowski, Daniel F. Moertl, Michael J. Palmer, Kelvin Wong
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Patent number: 10067032Abstract: A method, system, and computer program product are provided for back-up and restoration of data between volatile and flash memory. The method for controlling back-up of data to flash memory includes: organizing back-up data into stripes, wherein a stripe is a set of pages across all available flash memory devices, dies and planes which have the same block and page address; maintaining metadata indicating locations of known bad planes and grown bad planes; using the metadata when writing back-up data to determine which planes to send cache program commands to; and sending cache program commands to three or more stripes of data simultaneously including providing an indication in the stripe that the stripe is handling a cache program command If a grown bad block is encountered whilst saving a stripe of data, the stripe of data is re-written to the next available page address avoiding the grown bad block.Type: GrantFiled: November 8, 2017Date of Patent: September 4, 2018Assignee: International Business Machines CorporationInventors: Michael J. Palmer, Kelvin Wong
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Publication number: 20180107538Abstract: A mechanism is provided for loading a phase-locked loop (PLL) configuration into a PLL module using Flash memory. A Flash data image configuration from the Flash memory is loaded into a set of holding registers in response to the PLL module locking a current PLL configuration from a set of current configuration registers. The Flash data image configuration in the set of holding registers is compared to the current PLL configuration in the set of current configuration registers in response to the Flash data image configuration failing to be corrupted. The Flash data image configuration onto a PLL module input in response to the Flash data image configuration differing from the current PLL configuration. The Flash data image configuration is loaded in the set of holding registers into the set of current configuration registers in response to the PLL module locking the Flash data image configuration.Type: ApplicationFiled: October 18, 2016Publication date: April 19, 2018Inventors: Gerald M. Grabowski, Daniel F. Moertl, Michael J. Palmer, Kelvin Wong
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Publication number: 20180067018Abstract: A method, system, and computer program product are provided for back-up and restoration of data between volatile and flash memory. The method for controlling back-up of data to flash memory includes: organizing back-up data into stripes, wherein a stripe is a set of pages across all available flash memory devices, dies and planes which have the same block and page address; maintaining metadata indicating locations of known bad planes and grown bad planes; using the metadata when writing back-up data to determine which planes to send cache program commands to; and sending cache program commands to three or more stripes of data simultaneously including providing an indication in the stripe that the stripe is handling a cache program command If a grown bad block is encountered whilst saving a stripe of data, the stripe of data is re-written to the next available page address avoiding the grown bad block.Type: ApplicationFiled: November 8, 2017Publication date: March 8, 2018Inventors: Michael J. Palmer, Kelvin Wong
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Patent number: 9870299Abstract: A logic circuit comprises a plurality of functional logic units each having an independent clock signal and a trace bus for carrying trace data.Type: GrantFiled: October 15, 2013Date of Patent: January 16, 2018Assignee: International Business Machines CorporationInventors: Michael J. Palmer, Kelvin Wong
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Patent number: 9870165Abstract: A method and system are provided for back-up and restoration of data between volatile and flash memory. The method for controlling back-up of data to flash memory includes: organizing back-up data into stripes, wherein a stripe is a set of pages across all available flash memory devices, dies and planes which have the same block and page address; maintaining metadata indicating locations of known bad planes and grown bad planes; using the metadata when writing back-up data to determine which planes to send cache program commands to; and sending cache program commands to three or more stripes of data simultaneously including providing an indication in the stripe that the stripe is handling a cache program command. If a grown bad block is encountered whilst saving a stripe of data, the stripe of data is re-written to the next available page address avoiding the grown bad block.Type: GrantFiled: February 16, 2017Date of Patent: January 16, 2018Assignee: International Business Machines CorporationInventors: Michael J. Palmer, Kelvin Wong
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Publication number: 20170220276Abstract: A method and system are provided for back-up and restoration of data between volatile and flash memory. The method for controlling back-up of data to flash memory includes: organizing back-up data into stripes, wherein a stripe is a set of pages across all available flash memory devices, dies and planes which have the same block and page address; maintaining metadata indicating locations of known bad planes and grown bad planes; using the metadata when writing back-up data to determine which planes to send cache program commands to; and sending cache program commands to three or more stripes of data simultaneously including providing an indication in the stripe that the stripe is handling a cache program command If a grown bad block is encountered whilst saving a stripe of data, the stripe of data is re-written to the next available page address avoiding the grown bad block.Type: ApplicationFiled: February 16, 2017Publication date: August 3, 2017Inventors: Michael J. Palmer, Kelvin Wong
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Patent number: 9632715Abstract: A method and system are provided for back-up and restoration of data between volatile and flash memory. The method for controlling back-up of data to flash memory includes: organizing back-up data into stripes, wherein a stripe is a set of pages across all available flash memory devices, dies and planes which have the same block and page address; maintaining metadata indicating locations of known bad planes and grown bad planes; using the metadata when writing back-up data to determine which planes to send cache program commands to; and sending cache program commands to three or more stripes of data simultaneously including providing an indication in the stripe that the stripe is handling a cache program command. If a grown bad block is encountered while saving a stripe of data, the stripe of data is re-written to the next available page address avoiding the grown bad block.Type: GrantFiled: August 10, 2015Date of Patent: April 25, 2017Assignee: International Business Machines CorporationInventors: Michael J. Palmer, Kelvin Wong
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Patent number: 9611939Abstract: A gate valve is comprised of a gate movable between open and closed positions within a valve body, and gate having defined through it the gate an equalizer port or passageway between opposite sides of the gate with fixed side walls. The equalizer passageway being is opened and closed by an internal gate. The internal gate is in a close fitting engagement with each of a pair of opposing valve seats mounted with the gate and is shiftable by a carrier that does not constrain movement of the internal gate as it sits between the valve seats.Type: GrantFiled: November 2, 2012Date of Patent: April 4, 2017Assignee: Thunder Rose Enterprises, Inc.Inventor: Michael J. Palmer
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Publication number: 20170046081Abstract: A method and system are provided for back-up and restoration of data between volatile and flash memory. The method for controlling back-up of data to flash memory includes: organizing back-up data into stripes, wherein a stripe is a set of pages across all available flash memory devices, dies and planes which have the same block and page address; maintaining metadata indicating locations of known bad planes and grown bad planes; using the metadata when writing back-up data to determine which planes to send cache program commands to; and sending cache program commands to three or more stripes of data simultaneously including providing an indication in the stripe that the stripe is handling a cache program command. If a grown bad block is encountered whilst saving a stripe of data, the stripe of data is re-written to the next available page address avoiding the grown bad block.Type: ApplicationFiled: August 10, 2015Publication date: February 16, 2017Inventors: Michael J. Palmer, Kelvin Wong
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Patent number: 9501404Abstract: In one embodiment, a method for back-up of data to flash memory is provided. Backed up data is organized into one or more stripes, wherein a stripe comprises a set of pages across all available flash memory devices which have a same block and page address. Responsive to encountering an error in a block of flash memory during back-up of a particular stripe of data, the particular stripe of data is rewritten starting at a next available page address and excluding a page of flash memory for the block having the error. Subsequent stripes of data in the block having the error are written to pages excluding the page of flash memory for the block having the error.Type: GrantFiled: July 29, 2013Date of Patent: November 22, 2016Assignee: International Business Machines CorporationInventors: Michael J. Palmer, Peter M. Smith, Kelvin Wong
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Patent number: 9501356Abstract: Back-up of data to flash memory. Data to back up is written into stripes, which are sets of pages across flash memory backup devices having the same block and page address. First metadata is embedded in each stripe indicating any blocks of the flash memory known to be bad. In response to encountering a new error in a block of flash memory during writing data to back up to a stripe, re-writing the stripe starting at the next available stripe excluding pages on the block of flash memory having the new error, writing subsequent stripes excluding pages on the block of flash memory having the new error, and embedding second metadata in the re-written and subsequent stripes indicating the location of the block having the new error. Responsive to finding no bad blocks indicated in the first metadata, initiating a write to two or more stripes simultaneously.Type: GrantFiled: August 15, 2014Date of Patent: November 22, 2016Assignee: International Business Machines CorporationInventors: Michael J. Palmer, Kelvin Wong
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Publication number: 20150317210Abstract: In one embodiment, a method for back-up of data to flash memory is provided. Backed up data is organized into one or more stripes, wherein a stripe comprises a set of pages across all available flash memory devices which have a same block and page address. Responsive to encountering an error in a block of flash memory during back-up of a particular stripe of data, the particular stripe of data is rewritten starting at a next available page address and excluding a page of flash memory for the block having the error. Subsequent stripes of data in the block having the error are written to pages excluding the page of flash memory for the block having the error.Type: ApplicationFiled: July 29, 2013Publication date: November 5, 2015Applicant: International Business Machines CorporationInventors: Michael J. Palmer, Peter M. Smith, Kelvin Wong