Patents by Inventor Michael J. Redig

Michael J. Redig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4813005
    Abstract: A device for synchronizing the output test pattern signals of a test circuit with the clock signal of a device under test (DUT). The invention uses a programmable delay in the feedback loop of a phase locked loop system to adjust the phase of the test pattern signals to be synchronized with the clock of the device under test (DUT).
    Type: Grant
    Filed: June 24, 1987
    Date of Patent: March 14, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Michael J. Redig, David M. Prater