Abstract: An actuator for circuit interrupter has a stationary magnetic boss, a movable magnetic armature and a drive rod. The drive rod is aligned on an axis of the circuit interrupter. The drive rod has two stable positions, circuit interrupter closed and circuit interrupter open. The drive rod has a surface that the armature contacts to move the drive rod from the circuit interrupter closed position to the circuit interrupter open position. In the circuit interrupter closed position, the armature and the surface are separated by a pre-travel distance. The armature is to move towards the stationary magnetic boss and contact the surface, to initiate a circuit interrupter disconnecting motion of the drive rod with a transfer of momentum to the drive rod.

Abstract: Systems, methods, and computer-executable instructions for supporting custom functions within an application. An application add-in is received that includes a custom function and a custom function location. The application is available across multiple platforms. The custom function is also available across multiple platforms. The custom function is registered within the application using the custom function location. A request to invoke the custom function is received within the application A custom function implementation is downloaded from the custom function location. The custom function implementation is executed. A return value is received from the custom function implementation. The return value may be displayed within the application.

Abstract: Systems, methods, and computer-executable instructions for supporting custom functions within an application. An application add-in is received that includes a custom function and a custom function location. The application is available across multiple platforms. The custom function is also available across multiple platforms. The custom function is registered within the application using the custom function location. A request to invoke the custom function is received within the application A custom function implementation is downloaded from the custom function location. The custom function implementation is executed. A return value is received from the custom function implementation. The return value may be displayed within the application.

Abstract: Mechanisms are described herein for propagating a theme definition from a host application to a host extension so that the host application and the host extension are visually consistent. A theme definition may be updated after a theme change event occurs as a result of a user interacting with the host application. The theme definition may then be utilized by the host extension to update one or more UI elements presented by the host extension to enable visual consistency.

Abstract: Mechanisms are described herein for propagating a theme definition from a host application to a host extension so that the host application and the host extension are visually consistent. A theme definition may be updated after a theme change event occurs as a result of a user interacting with the host application. The theme definition may then be utilized by the host extension to update one or more UI elements presented by the host extension to enable visual consistency.

Abstract: A method of dynamically allocating the amount of input/output (I/O) rate capacity to partitions in a computer system includes determining a total amount of I/O rate capacity and an economic value of each partition within the partitioned computer system. The economic value is defined as a performance-valued product established for each partition wherein the sum of all performance-value products for each partition defines a total economic value for the computer. The I/O rate to be allocated to each partition is calculated to be a portion of the total amount of I/O rate capacity where the portion allocated to each partition is proportional to the economic value of that respective partition. The calculated rate allocations are recorded in memory which is accessible to each partition. After recording, each partition regulates its I/O usage according to the recorded allocation.

Abstract: Multiple inductor structures and methods for providing low mutual inductance between the inductors are described. In various embodiments of the invention, the polarities of the inductors are positioned such that parasitic mutual inductance is reduced by causing electro-magnetic fields to at least partially cancel resulting in a reduction in interference between the inductors. The polarities of the magnetic fields produced by each inductor are opposite to each other so that at least a partial cancellation results when the fields interfere with each other.

Abstract: The present invention provides a method for performing design rule check (DRC) of an integrated circuit. A design layout of the integrated circuit is provided. The integrated circuit includes a complex circuit. A DRC tool is used to compare a portion of the design layout with a reference layout containing an accurate implementation of the complex circuit. The portion of the design layout corresponds to the complex circuit.

Abstract: Multiple inductor structures and methods for providing low mutual inductance between the inductors are described. In various embodiments of the invention, the polarities of the inductors are positioned such that parasitic mutual inductance is reduced by causing electro-magnetic fields to at least partially cancel resulting in a reduction in interference between the inductors. The polarities of the magnetic fields produced by each inductor are opposite to each other so that at least a partial cancellation results when the fields interfere with each other.

Abstract: A plate to plate capacitor has a first plate, a second plate, and an insulating medium separating the first plate from the second plate. The first plate and the second plate are adapted and arranged to form an interlaced structure in which multiple capacitance surface areas in different planes, such as horizontal and vertical, are provided between said first and second plates. The plate to plate capacitor can be formed as a stack of layers in which one or more alternating first and third insulating layers each have first and second conductive lines configured therein and in which one or more second insulating layers having conductive vias formed therein interpose respective first and third insulating layers. The first and second conductive lines in the first insulating layer(s) are interconnected by the conductive vias to the first and second conductive lines, respectively, in the third layer(s) so as to interlace the first and second metal conductive lines together.

Abstract: A method of generating a schematic driven layout for an integrated circuit design includes steps of: (a) receiving as input a representation of a integrated circuit design comprising a hierarchy of blocks; (b) selecting a block in the hierarchy of blocks that requires a physical design and that contains no missing components; (c) generating a physical design for the selected block so that the selected block is no longer a missing component of any other block; and (d) repeating steps (b) and (c) until a physical design has been generated for each block in the hierarchy of blocks.

Abstract: The present invention provides systems and methods for allocating a pool of global memory among a set of client/servers so that storage volumes associated with a plurality of client/servers are each allocated a portion of the pool of global memory for caching of data from that volume. The amount of memory to be used for caching the volume's input/output operations (I/Os), the page size, the cache type, the cache replacement policy and the maximum cache read can be specified by volume. The amount of memory to be used for caching the volume's input/output operations, the cache type, the cache replacement policy and the maximum cache read I/O size can be changed dynamically by the changing volume-based attributes.

Abstract: A removable robotic sensor assembly is removably coupled to a robotic arm having a work tool secured thereto. The removable robotic sensor assembly includes a sensor for obtaining data from a work piece. The removable robot sensor assembly further includes a gripper assembly coupled to the sensor. The gripper assembly operable to alternately couple to and decouple from at least one of the work tool and the robotic arm when said work tool is secured to the robotic arm. The gripper assembly and said sensor form a sensor assembly.

Abstract: A mainframe computing system is adapted to be loaded with one of a plurality of different operating systems and different associated microcode to provide a computing system which is capable of running user programs adapted to be executed by the loaded operated system comprises a main memory for receiving the desired operating system coupled to a system bus. An instruction processor and an input/output control processor are coupled to the system bus and are provided with an instruction register for presenting user program instructions to the processors. The processor means have associated therewith microcode storage memory which receive and store a set of microcode instructions to be performed by the processors according to the program instruction stored in the instruction register. The stored microcode comprises primary microcode instructions to carry out each of the instructions in the instruction register means.

Abstract: An apparatus for enhancing the operation of a M byte instruction word CPU when operating user programs on an N byte instruction word CPU. The M-Byte instruction word CPU is provided with an N-Byte instruction register and a main memory for supplying N-Byte instruction words or M-Byte instruction words to said N-Byte instruction register. An operational code multiplexer and an parameter code multiplexer are connectable to selective outputs of said instruction register so that any one of the M-Bytes may be selected as an operational code and any one of the remaining M-Bytes may be selected as parameter code bytes, and selection means including sequencer means are provided for operating the operational code multiplexer and the parameter code multiplexer in an M-Byte instruction word CPU mode of operation or as an N-Byte instruction word CPU mode of operation.

Abstract: The present invention provides a novel programmable data communications controller employed to accept data from a host computing system and for transmitting the data to a terminal designated by the host computer system. The data computer communications controller is further provided with protocols, parameters and poll tables stored in a dedicated memory of the data communications controller which enables the controller to receive data and address information from a main memory of a host computer and to reformat and pre-package the information in a protocol format block acceptable by a terminal coupled to the data communications controller. Different protocols, parameters and polls are provided in the data communications controller in the form of preprogrammed information which enables different terminals employing different protocols and protocol formats to be coupled directly to a data link interface bus without hardware modifications.