Abstract: When a read request for the data portion is received from an application executing on a host, the host may determine whether the data portion is in host cache, and if so, whether the logical storage unit of the data portion is shared by another host system. If there is another host system sharing the logical storage unit, a latest version stored on the storage system may be determined and compared to the version stored in the host cache. If the version in the host cache is the same as the latest version stored on the storage system, the data portion may be retrieved from the host cache. If the version in the host cache is not the latest version stored on the storage system, the data portion may be retrieved from the storage system, and the host cache may be updated with the latest version of the data portion.

Abstract: Described herein are systems and techniques for determining when excessive I/O response times are not the fault of a storage port, but rather are caused by other factors or components on a storage network, for example, over-utilization of a host port. For one or more host ports and/or storage ports, a payload idle time (PIT) may be determined for each I/O operation, the PIT being the amount of time during which a storage port is waiting for a host port to be ready to send or receive data of the respective I/O operation. It may be determined whether one or more of the PITs includes an excessive idle time (EIT), where the EIT may be an amount of the PIT that is more than a predefined acceptable amount of time. The cause of the EIT may be determined.

Abstract: Sector signature patterns with sector signature values and sector signature parity values are embedded with data slices. A new pattern is embedded with a slice each time the slice data is updated. The patterns are selected in order such that every sector signature value and sector signature parity value changes when a new pattern is embedded. A separate metadata record such as a key is maintained to indicate which pattern has been embedded with the slice. A data integrity check is performed by comparing the embedded sector signature parity values with the metadata record and/or performing a pattern-to-key lookup.

Abstract: Sector signature patterns with sector signature values and sector signature parity values are embedded with data slices. A new pattern is embedded with a slice each time the slice data is updated. The patterns are selected in order such that every sector signature value and sector signature parity value changes when a new pattern is embedded. A separate metadata record such as a key is maintained to indicate which pattern has been embedded with the slice. A data integrity check is performed by comparing the embedded sector signature parity values with the metadata record and/or performing a pattern-to-key lookup.

Abstract: A high performance logical device having low latency may be provided. I/Os to the logical device may be sent only to a primary director having sole ownership of the logical device. The primary director may perform operations locally for the logical device. Such operations may include allocating global memory for use with the logical device from only a global memory portion that is local to the primary director. The global memory may be a distributed global memory including memory from multiple directors and possibly multiple engines. Cached data for the logical device may be mirrored automatically by the data storage system. Alternatively, the cached data for the logical device may be mirrored using a host-based mirroring technique.

Abstract: A storage system may maintain a purge counter for one or more logical storage units. When an instruction is received to perform an operation that will modify data across the one or more logical storage units, the purge counter may be incremented. One or more host systems implementing host caching may periodically poll the storage system to determine the purge counter value. When the current value of the purge counter value is different than a previously polled purge counter value recorded on a host system, the host system may purge from its host cache any entries for logical storage units associated with the purge counter. The data storage system may not execute the data modification instruction until it receives acknowledgement from all host systems caching data affected by the modification instruction that the host system has purged any host cache entries corresponding to the LSUs affected by the modification operation.

Abstract: When a read request for the data portion is received from an application executing on a host, the host may determine whether the data portion is in host cache, and if so, whether the logical storage unit of the data portion is shared by another host system. If there is another host system sharing the logical storage unit, a latest version stored on the storage system may be determined and compared to the version stored in the host cache. If the version in the host cache is the same as the latest version stored on the storage system, the data portion may be retrieved from the host cache. If the version in the host cache is not the latest version stored on the storage system, the data portion may be retrieved from the storage system, and the host cache may be updated with the latest version of the data portion.

Abstract: A storage system may maintain a purge counter for one or more logical storage units. When an instruction is received to perform an operation that will modify data across the one or more logical storage units, the purge counter may be incremented. One or more host systems implementing host caching may periodically poll the storage system to determine the purge counter value. When the current value of the purge counter value is different than a previously polled purge counter value recorded on a host system, the host system may purge from its host cache any entries for logical storage units associated with the purge counter. The data storage system may not execute the data modification instruction until it receives acknowledgement from all host systems caching data affected by the modification instruction that the host system has purged any host cache entries corresponding to the LSUs affected by the modification operation.

Abstract: The system, devices, and methods disclosed herein relate to data ratio reduction technology adapted to reduce storage costs by weeding out duplicative data write operations. The techniques and systems disclosed achieve deduplication benefits of smaller block, finer granularity, deduplication systems while simultaneously reducing the enormous metadata costs traditionally associated with small block deduplication. According to an exemplary 128 K block deduplication system and method, we disclose deduplication rates nearly equivalent to 4 K deduplication systems.

Abstract: The system, devices, and methods disclosed herein relate to data ratio reduction technology adapted to reduce storage costs by weeding out duplicative data write operations. The techniques and systems disclosed achieve deduplication benefits by reducing the size of hash values stored hash tables used to compare unwritten data blocks to data that has already been written and stored somewhere in physical storage. The data deduplication systems, methods, and products facilitate deduplication at the block level as well as for misaligned data chunks within data blocks, that is an unwritten data block that has been stored sequentially in two different physical locations. The deduplication teachings herein are amenable to varying data block sizes as well as data chunk sizes within blocks. Our embodiments enhance computer performance by substantially reducing computational speeds and storage requirements attendant to deduplication systems using larger hash table data sizes.

Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data into a first local cache in response to a first processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the first local cache is accessible to the first subset of the processors and is inaccessible to other processors, loading data into a second local cache in response to a second processor of the second subset of the processors performing a read operation to the specific portion of non-volatile storage, where the second local cache is accessible to the second subset of the processors and is inaccessible to other processors, and loading data into a global cache in response to one of the processors performing a write operation to the specific portion of non-volatile storage, where the global cache is accessible to all the processors.

Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data from a specific portion of non-volatile storage into a local cache area in response to a specific processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the local cache area is accessible to the first subset of the processors and is inaccessible to a second subset of the processors that is different than the first subset of the processors and includes loading data from the specific portion of non-volatile storage into a global cache area in response to one of the processors performing a write operation to the specific portion of non-volatile storage, where the global cache area is accessible to the first subset of the processors and to the second subset of the processors. Different processors may be placed on different directors.

Abstract: Described herein are systems and techniques for determining when excessive I/O response times are not the fault of a storage port, but rather are caused by other factors or components on a storage network, for example, over-utilization of a host port. For one or more host ports and/or storage ports, a payload idle time (PIT) may be determined for each I/O operation, the PIT being the amount of time during which a storage port is waiting for a host port to be ready to send or receive data of the respective I/O operation. It may be determined whether one or more of the PITs includes an excessive idle time (EIT), where the EIT may be an amount of the PIT that is more than a predefined acceptable amount of time. The cause of the EIT may be determined.

Abstract: A storage array presents a logical production volume that is backed by tangible data storage devices. The production volume is organized into fixed size front end allocation units. The tangible data storage devices are organized into discrete size back end allocation units of a plurality of different sizes. Data associated with each one of the front end allocation units is stored on only one of the back end allocation units. For example, compressed data may be stored on a back end allocation unit that is smaller than a front end allocation unit while maintaining a 1-to-1 relationship between the front end allocation unit and the back end allocation unit.

Abstract: The system, devices, and methods disclosed herein relate to data ratio reduction technology adapted to reduce storage costs by weeding out duplicative data write operations. The techniques and systems disclosed achieve deduplication benefits by reducing the size of hash values stored hash tables used to compare unwritten data blocks to data that has already been written and stored somewhere in physical storage. The data deduplication systems, methods, and products facilitate deduplication at the block level as well as for misaligned data chunks within data blocks, that is an unwritten data block that has been stored sequentially in two different physical locations. The deduplication teachings herein are amenable to varying data block sizes as well as data chunk sizes within blocks. Our embodiments enhance computer performance by substantially reducing computational speeds and storage requirements attendant to deduplication systems using larger hash table data sizes.

Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data from a specific portion of non-volatile storage into a local cache area in response to a specific processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the local cache area is accessible to the first subset of the processors and is inaccessible to a second subset of the processors that is different than the first subset of the processors and includes loading data from the specific portion of non-volatile storage into a global cache area in response to one of the processors performing a write operation to the specific portion of non-volatile storage, where the global cache area is accessible to the first subset of the processors and to the second subset of the processors. Different processors may be placed on different directors.

Abstract: Maintaining multiple cache areas in a storage device having multiple processors includes loading data into a first local cache in response to a first processor of a first subset of the processors performing a read operation to the specific portion of non-volatile storage, where the first local cache is accessible to the first subset of the processors and is inaccessible to other processors, loading data into a second local cache in response to a second processor of the second subset of the processors performing a read operation to the specific portion of non-volatile storage, where the second local cache is accessible to the second subset of the processors and is inaccessible to other processors, and loading data into a global cache in response to one of the processors performing a write operation to the specific portion of non-volatile storage, where the global cache is accessible to all the processors.

Abstract: The system, devices, and methods disclosed herein relate to data ratio reduction technology adapted to reduce storage costs by weeding out duplicative data write operations. The techniques and systems disclosed achieve deduplication benefits of smaller block, finer granularity, deduplication systems while simultaneously reducing the enormous metadata costs traditionally associated with small block deduplication. According to an exemplary 128 K block deduplication system and method, we disclose deduplication rates nearly equivalent to 4 K deduplication systems.

Abstract: A high performance logical device having low latency may be provided. I/Os to the logical device may be sent only to a primary director having sole ownership of the logical device. The primary director may perform operations locally for the logical device. Such operations may include allocating global memory for use with the logical device from only a global memory portion that is local to the primary director. The global memory may be a distributed global memory including memory from multiple directors and possibly multiple engines. Cached data for the logical device may be mirrored automatically by the data storage system. Alternatively, the cached data for the logical device may be mirrored using a host-based mirroring technique.

Abstract: A high performance logical device having low latency may be provided. I/Os to the logical device may be sent only to a primary director having sole ownership of the logical device. The primary director may perform operations locally for the logical device. Such operations may include allocating global memory for use with the logical device from only a global memory portion that is local to the primary director. The global memory may be a distributed global memory including memory from multiple directors and possibly multiple engines. Cached data for the logical device may be mirrored automatically by the data storage system. Alternatively, the cached data for the logical device may be mirrored using a host-based mirroring technique.