Patents by Inventor Michael J. Seymour

Michael J. Seymour has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240382032
    Abstract: Disclosed is a cold brew coffee maker and related methods of making cold brew coffee. The cold brew coffee maker can include a rotation assembly, a brew chamber, and a strainer/stirrer assembly. The strainer/stirrer assembly is adapted to be insertable into the brew chamber. The strainer/stirrer assembly having a first and second impeller that are located at a bottom portion of the strainer/stirrer assembly, the first impeller being located externally to the strainer/stirrer assembly and the second impeller located within a chamber formed by the strainer/stirrer assembly.
    Type: Application
    Filed: April 29, 2024
    Publication date: November 21, 2024
    Inventors: Aaron J. Munsinger, Michael R. Berge, Justun C. Seymour
  • Patent number: 9118467
    Abstract: A client device that is coupled to a host device sends a parent public key and an associated certificate to the host device. The parent public key, the certificate and a corresponding parent private key are stored in secure persistent storage included in a secure device associated with the client device. The client device receives instructions from the host device for generating a child private and public key pair. In response to receiving the instructions, the client device generates a child private key based on a first random number produced within the secure device, and a child public key associated with the child private key. The client device computes a first signature on the child public key using the parent private key. The client device sends the child public key and the first signature to the host device.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: August 25, 2015
    Assignee: Atmel Corporation
    Inventors: Kerry David Maletsky, Michael J. Seymour, Brad Phillip Garner
  • Publication number: 20140281554
    Abstract: A client device that is coupled to a host device sends a parent public key and an associated certificate to the host device. The parent public key, the certificate and a corresponding parent private key are stored in secure persistent storage included in a secure device associated with the client device. The client device receives instructions from the host device for generating a child private and public key pair. In response to receiving the instructions, the client device generates a child private key based on a first random number produced within the secure device, and a child public key associated with the child private key. The client device computes a first signature on the child public key using the parent private key. The client device sends the child public key and the first signature to the host device.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: ATMEL CORPORATION
    Inventors: Kerry David Maletsky, Michael J. Seymour, Brad Phillip Garner
  • Publication number: 20140089670
    Abstract: Methods and systems are disclosed for verifying the use of a client device by a host device in a secure system. In one aspect, a method for authenticating a client device includes receiving, by the client device, a message from a host device, accessing, by the client device, a private key and a unique code stored on the client device, where the unique code is different than the private key, generating, by the client device, a digital signature for the message using the private key and the unique code, and providing, by the client device, the digital signature to the host device for verification of the use of the client device by the host device.
    Type: Application
    Filed: September 27, 2012
    Publication date: March 27, 2014
    Applicant: Atmel Corporation
    Inventors: Kerry Maletsky, David Durant, Balaji Badam, Michael J. Seymour
  • Publication number: 20140062442
    Abstract: Methods and systems are disclosed for an integrated voltage regulator with open loop digital control for power stepping. In one aspect, a method for regulating an output voltage includes receiving data indicative of a power setting associated with an identified state of an electrical circuit, the power setting based on a load current demand of the electrical circuit in the identified state, enabling one or more parallel driver segments based on the received data indicative of the power setting. The method further includes sourcing by the enabled one or more parallel driver segments sufficient current to meet the load current demand of the electrical circuit in the identified state while maintaining the output voltage at a predetermined voltage level, and providing the output voltage to the electrical circuit at the predetermined voltage level.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 6, 2014
    Applicant: Atmel Corporation
    Inventors: Michael J. Seymour, Daniel J. Russell
  • Patent number: 8240049
    Abstract: An improved apparatus and method of removing tubes and/or tube stubs from structures comprising multiple tubes wherein induction heating is utilized to heat the tube stub prior to removal.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: August 14, 2012
    Inventor: Michael J. Seymour
  • Publication number: 20090229128
    Abstract: An improved apparatus and method of removing tubes and/or tube stubs from structures comprising multiple tubes wherein induction heating is utilized to heat the tube stub prior to removal.
    Type: Application
    Filed: January 15, 2009
    Publication date: September 17, 2009
    Inventor: Michael J. Seymour
  • Patent number: 6028491
    Abstract: An oscillator circuit having a first node oscillating with a first indeterminate duty cycle and having a second node oscillating with a predetermined second duty cycle. Both nodes oscillate at similar frequencies. A variable current source and a switch are coupled in series between Vcc and ground with the output of the variable current source being the second node. The first node controls the switch, which is closed when the first node is at a first logic state and is opened when it is at a second logic state. During each cycle, a monitoring circuit measures the time span that the first node is at the first logic state and adjusts the magnitude of the variable current source to make it directly proportional to the measured time span. By adjusting the variable current source, the second node can be made to reach a desired voltage level in a desired amount of time during each cycle. In a second embodiment, a current limiting transistor is inserted between the second node and the switch.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: February 22, 2000
    Assignee: Atmel Corporation
    Inventors: Carl M. Stanchak, Michael J. Seymour
  • Patent number: 5489861
    Abstract: An output buffer circuit with edge-rate control capable of maintaining both rising and falling edge-rates within narrow specifications in the face of wide variations in load impedance. In particular, the output buffer of the present invention is intended for coupling to a common bus whereby it may be presented with very low resistive impedance loads and varying capacitive loads. The control schemes for both the pull-up and the pull-down parts of the circuit of the present invention utilize in part fixed currents charging a selected capacitance in order to achieve a metering of the charging or discharging current at the buffer's output. For the pull-down part of the circuit a dual MOS/Bipolar pull-down scheme is used, with the MOS transistors sequentially turning on in a gradual fashion so as to smooth the onset of current sinking. Subsequently, after a measured delay, a bipolar pull-down transistor is turned on.
    Type: Grant
    Filed: December 20, 1993
    Date of Patent: February 6, 1996
    Assignee: National Semiconductor Corporation
    Inventor: Michael J. Seymour
  • Patent number: 5220209
    Abstract: An edge controlled output buffer circuit reduces the amplitude of power rail noise while maintaining high switching speed by controlled storage and release of charge at the output using new charge storage and discharge capacitor circuits coupled to the output. An output discharging storage capacitor (C1) is coupled to the high potential power rail (V.sub.CC). A first passgate circuit PSGT1 is coupled between the charge storage capacitor (C1) and the output (V.sub.OUT). A first control circuit (CTR1) is coupled to the control node (m2) of the first passgate circuit (PSGT1) for transient turn on of the first passgate circuit (PSGT1) when the output is still at high potential level during transition from high to low potential level at the output. A second passgate circuit (PSGT2) is coupled between the charge storage capacitor (C1) and the low potential power rail (GND).
    Type: Grant
    Filed: September 27, 1991
    Date of Patent: June 15, 1993
    Assignee: National Semiconductor Corporation
    Inventor: Michael J. Seymour
  • Patent number: 5049160
    Abstract: Cleaning compound for cleaning the hair and fur of mounted animals comprises about fifty percent by weight of a dry form sodium carbonate peroxyhydrate, forty percent by weight dry sodium carbonate, and ten percent by weight of dry surfactant, preferably sodium dodecylbenzenesulfonate. The compound is dissolved in water, and sprayed on the hair or fur of mounted animals.
    Type: Grant
    Filed: July 19, 1989
    Date of Patent: September 17, 1991
    Inventor: Michael J. Seymour