Abstract: An active matrix substrate includes a row and column array of active elements. Each element is associated with a TFT having a gate electrode connected to a corresponding row conductor and source and drain (electrodes connected to corresponding column conductors. Circuitry for protecting against electrostatic discharge (ESD) is connected to at least one of the row conductors for protecting the TFTs against ESD.

Abstract: A method of manufacturing an active matrix substrate (1) comprising a row and column array of active elements (10) wherein each element (11) is associated with a TFT (13) having a gate electrode (306) connected to a corresponding row conductor (15) and source (320) and drain (321) electrodes connected to corresponding column conductors (14), and ESD protective circuitry (20) connected to at least one of the row conductors for protecting the TFTs against electrostatic discharge (ESD). The method comprising the steps of forming semiconductor regions of the TFTs (302) and the ESD protective circuitry (303); depositing gate electrodes (306) of the TFTs and corresponding row conductors (15); and depositing source (320) and drain (321) electrodes of the TFTs and corresponding column conductors (14), wherein the ESD protective circuitry (20) is operative to control ESD prior to deposition of the column conductors (14).

Abstract: An active matrix substrate includes a row and column array of active elements. Each element is associated with a TFT having a gate electrode connected to a corresponding row conductor and source and drain (electrodes connected to corresponding column conductors. Circuitry for protecting against electrostatic descharge (ESD) in connected to at least one of the row conductors for protecting the TFTs against ESD. A method for manufacturing the active matrix substrate includes forming semiconductor regions of the TFTs and the ESD protective circuitry, depositing gate electrodes of the TFTs and corresponding row conductors, and depositing source and drain electrodes of the TFTs and corresponding column conductors. The ESD protective circuitry operates to control ESD prior to deposition of the column conductors.

Abstract: A method of manufacturing a TFT (10) is disclosed comprising source (8) and drain (8″) electrodes joined by a semiconductor channel (6) formed from a semiconductor layer (4), a gate insulating layer (7) and a gate electrode (8′). The method comprising the steps of applying a foil (2) comprising a crystallization enhancing material (CEM) and depositing the semiconductor layer (4) over a supporting substrate (1); and heating the semiconductor layer (4) so as to crystallize the semiconductor layer (4) from regions exposed to the CEM of the foil (2). The method may further comprise the step of providing a patterned barrier layer (3) between the foil (2) and the semiconductor layer (4) wherein the semiconductor layer (4) is crystallized from regions exposed through vias in the barrier layer (3) to the CEM of the foil (2).

Abstract: A micromechanical switch is disclosed comprising a conductive beam (14, 14′) partially suspended above a substrate (10), at least one contact electrode (12, 12′) adjacent the conductive beam and at least one control electrode (13, 13′) adjacent the conductive beam; wherein, upon application of a potential at the control electrode, the beam is deflectable in the plane of the substrate whereby the conductive beam may be selectively contacted with the contact electrode to create an electrical path between them. In particular, the conductive beam may be elongate in the plane of the substrate and has an elongate cross section in a direction perpendicular to the substrate.

Abstract: A method of manufacturing an active matrix substrate (1) comprising a row and column array of active elements (10) wherein each element (11) is associated with a TFT (13) having a gate electrode (306) connected to a corresponding row conductor (15) and source (320) and drain (321) electrodes connected to corresponding column conductors (14), and ESD protective circuitry (20) connected to at least one of the row conductors for protecting the TFTs against electrostatic discharge (ESD). The method comprising the steps of forming semiconductor regions of the TFTs (302) and the ESD protective circuitry (303); depositing gate electrodes (306) of the TFTs and corresponding row conductors (15); and depositing source (320) and drain (321) electrodes of the TFTs and corresponding column conductors (14), wherein the ESD protective circuitry (20) is operative to control ESD prior to deposition of the column conductors (14).

Abstract: A thin-film circuit element such as a top-gate TFT has good quality electrical contacts formed between an electrode (151, 152, 155) of chromium nitride and the semiconductor film (50) of the circuit element and/or another conductive film such as a connection track (37,39,40) of, for example, aluminium. Chromium nitride has a particularly advantageous combination of propertied for use as such an electrode material, including, for example, low affinity for oxide growth even during deposition thereon of semiconductor, insulating and/or metal films, a doping potential to enhance ohmic contact to semiconductors, a barrier function against potential impurities, good thin-film processing compatibility, and hillock prevention in an underlying aluminium conductor.

Abstract: A method of manufacturing a TFT (10) is disclosed comprising source (8) and drain (8″) electrodes joined by a semiconductor channel (6) formed from a semiconductor layer (4), a gate insulating layer (7) and a gate electrode (8′). The method comprising the steps of applying a foil (2) comprising a crystallisation enhancing material (CEM) and depositing the semiconductor layer (4) over a supporting substrate (1); and heating the semiconductor layer (4) so as to crystallise the semiconductor layer (4) from regions exposed to the CEM of the foil (2). The method may further comprise the step of providing a patterned barrier layer (3) between the foil (2) and the semiconductor layer (4) wherein the semiconductor layer (4) is crystallised from regions exposed through vias in the barrier layer (3) to the CEM of the foil (2).

Abstract: A thin-film circuit element such as a top-gate TFT has good quality electrical contacts formed between an electrode (151, 152, 155) of chromium nitride and the semiconductor film (50) of the circuit element and/or another conductive film such as a connection track (37,39,40) of, for example, aluminium. Chromium nitride has a particularly advantageous combination of properties for use as such an electrode material, including, for example, low affinity for oxide growth even during deposition thereon of semiconductor, insulating and/or metal films, a doping potential to enhance ohmic contact to semiconductors, a barrier function against potential impurities, good thin-film processing compatibility, and hillock prevention in an underlying aluminium conductor.

Abstract: A method for generating a random time interval suited for use in defining re-transmission time intervals so as to avoid communication contention utilizes at least one external seed and a plurality of linear maximal sequences. According to one embodiment, a first seed is provided and a first linear maximal sequence is initialized therewith. A second seed is generated via cooperation of the first linear maximal sequence and the external signal. At least one second linear maximal sequence is initialized with the second seed. A new time interval is started when the second linear maximal sequence sequences to a predetermined value.

Abstract: A balanced battery charger maintains a balanced charge upon a plurality of battery cells which are connected in series with one another. The balanced battery changer has a monitoring circuit for determining when an imbalance between the charge upon the battery cells occurs and a charging/discharging circuit for selectively charging and discharging at least a selected one of the battery cells so as to generally balance the charge upon the battery cells. Balancing the charge upon the battery cells substantially enhances the life thereof.

Abstract: Improved electronic circuitry incorporated into a tag attached to a user worn wrist strap of a static electrical discharge dissipation system. The electronic circuitry monitors the electrical connection of the wrist strap from the user to ground and tests the functionality of the tag. The electronic circuitry comprises an oscillator, a signal transmitter, a discharge resistor and a discharge resistor check circuit for monitoring the accuracy of the discharge resistor. The electronic circuitry also comprises a skin resistance check circuit for monitoring the electrical connection of the wrist strap to the user, and a ground fault detect circuit for monitoring the electrical connection of the wrist strap to ground.