Abstract: The system and method creates a substantially constant output voltage ripple in a buck converter in discontinuous conduction mode by varying the on-time of a pulse width modulator (PWM) signal driving the buck converter when the buck converter is operating in discontinuous conduction mode. A first signal is generated that is a function of the switching frequency of the buck converter. This signal is low-pass filtered and compared with a second signal that is a function of the switching frequency of the buck converter when operating in continuous conduction mode and with constant PWM on-time. The output signal generated by the comparator is a signal that is equal to the ratio of the first signal and the second signal. The on-time of a voltage controlled oscillator is controlled by the output signal, the oscillator signal causing the on-time of the PWM signal to vary in a controlled fashion.

Abstract: The system and method creates a substantially constant output voltage ripple in a buck converter in discontinuous conduction mode by varying the on-time of a pulse width modulator (PWM) signal driving the buck converter when the buck converter is operating in discontinuous conduction mode. A first signal is generated that is a function of the switching frequency of the buck converter. This signal is low-pass filtered and compared with a second signal that is a function of the switching frequency of the buck converter when operating in continuous conduction mode and with constant PWM on-time. The output signal generated by the comparator is a signal that is equal to the ratio of the first signal and the second signal. The on-time of a voltage controlled oscillator is controlled by the output signal, the oscillator signal causing the on-time of the PWM signal to vary in a controlled fashion.

Abstract: An electronic system, DC-DC voltage converter, method of operating a buck-boost DC-DC converter, and method for power mode transitioning in a DC-DC voltage converter are disclosed. For example, one method includes receiving a compensated error signal associated with an output voltage of the DC-DC voltage converter, determining a power mode of operation of the DC-DC voltage converter, and if the power mode of operation is a first mode, outputting a first control signal to regulate the output voltage of the DC-DC voltage converter. If the power mode of operation is a second mode, outputting a second control signal to regulate the output voltage of the DC-DC voltage converter, and if the power mode of operation is a third mode, outputting a third control signal to regulate the output voltage of the DC-DC voltage converter.

Abstract: Systems and methods for overcurrent protection in a battery charger are provided. For example, a method for overcurrent protection may include controlling a switching regulator to direct electrical current between the switching regulator and a battery port; sensing a voltage drop that is related to the electrical current passing between the switching regulator and the battery port; applying a first ramp voltage to the sensed voltage drop generating a modified sensed voltage drop; comparing the modified sensed voltage drop against at least one reference voltage; and when the modified sensed voltage drop exceeds the at least one reference voltage, changing operation of the switching regulator to protect the battery charger from an overcurrent state.

Abstract: A voltage error signal VERR is provided to a PWM controller of a voltage regular and used to produce a PWM signal that drives a power stage of the regulator. When operating in an adaptor current limit regulation mode, an adaptor current sense voltage VACS, indicative of an adapter current IA, is compared to an adapter current reference voltage VAC—REF to produce an adapter current error signal VAC—ERR. A compensator receives the adapter current error signal VAC—ERR and outputs a compensated adapter current error signal. The adaptor current sense voltage VACS, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal VERR provided to the PWM controller. Alternatively, an input voltage VIN, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal VERR.

Abstract: The system and method creates a substantially constant output voltage ripple in a buck converter in discontinuous conduction mode by varying the on-time of a pulse width modulator (PWM) signal driving the buck converter when the buck converter is operating in discontinuous conduction mode. A first signal is generated that is a function of the switching frequency of the buck converter. This signal is low-pass filtered and compared with a second signal that is a function of the switching frequency of the buck converter when operating in continuous conduction mode and with constant PWM on-time. The output signal generated by the comparator is a signal that is equal to the ratio of said first signal and said second signal. The on-time of a voltage controlled oscillator is controlled by said output signal, the oscillator signal causing the on-time of said PWM signal to vary in a controlled fashion.

Abstract: An embodiment of a power supply includes an input node operable to receive an input voltage, an output node operable to provide a regulated output voltage, an odd number of magnetically coupled phase paths each coupled between the input and output nodes, and a first magnetically uncoupled phase path coupled between the input and output nodes. Such a power supply may improve its efficiency by activating different combinations of the coupled and uncoupled phase paths depending on the load conditions. For example, the power supply may activate only an uncoupled phase path during light-load conditions, may activate only coupled phase paths during moderate-load conditions, and may activate both coupled and uncoupled phase paths during heavy-load conditions and during a step-up load transient.

Abstract: A method and system control the adding or dropping of phases in a multiphase voltage regulator. The regulator has an efficiency and this efficiency of the regulator is calculated for a given number of phases being activated from an output voltage, input voltage, output current, and duty cycle of the regulator. The efficiency of the regulator is also calculated if a phase is added using the derivative of the duty cycle as a function of the output current. The efficiency of the regulator is further calculated if a phase is dropped using the derivative of the duty cycle as a function of the output current. From these operations of calculating, a phase is either added, dropped, or the phase is maintained at its current value to thereby optimize the efficiency of the regulator.

Abstract: A voltage regulator generates a regulated output voltage responsive to an input voltage and drive control signals. An error amplifier generates an error voltage signal responsive to the regulated output voltage and a reference voltage. A PWM modulator generates a PWM control signal responsive to the error voltage signal, a ramp voltage and an inverse of the reference voltage. Control circuitry within the PWM modulator maintains the error voltage signal applied to the PWM modulator at substantially a same DC voltage level over the reference voltage operating range and maintains the error voltage signal above a minimum value of the ramp voltage. Driver circuitry generates the drive control signals responsive to the PWM control signal.

Abstract: An embodiment of a power supply includes an input node operable to receive an input voltage, an output node operable to provide a regulated output voltage, an odd number of magnetically coupled phase paths each coupled between the input and output nodes, and a first magnetically uncoupled phase path coupled between the input and output nodes. Such a power supply may improve its efficiency by activating different combinations of the coupled and uncoupled phase paths depending on the load conditions. For example, the power supply may activate only an uncoupled phase path during light-load conditions, may activate only coupled phase paths during moderate-load conditions, and may activate both coupled and uncoupled phase paths during heavy-load conditions and during a step-up load transient.

Abstract: An embodiment of a power supply includes an input node that receives an input voltage, an output node on which a regulated output voltage is provided, an odd number of magnetically coupled phase paths each coupled between the input and output nodes, and a first magnetically uncoupled phase path coupled between the input and output nodes. Such a power supply can improve its efficiency by activating different combinations of the coupled and uncoupled phase paths depending on the load conditions. For example, the power supply may activate only an uncoupled phase path during light-load conditions, may activate only coupled phase paths during moderate-load conditions, and may activate both coupled and uncoupled phase paths during heavy-load conditions and during a step-up load transient.

Abstract: An embodiment of a power supply includes an input node that receives an input voltage, an output node on which a regulated output voltage is provided, an odd number of magnetically coupled phase paths each coupled between the input and output nodes, and a first magnetically uncoupled phase path coupled between the input and output nodes. Such a power supply can improve its efficiency by activating different combinations of the coupled and uncoupled phase paths depending on the load conditions. For example, the power supply may activate only an uncoupled phase path during light-load conditions, may activate only coupled phase paths during moderate-load conditions, and may activate both coupled and uncoupled phase paths during heavy-load conditions and during a step-up load transient.

Abstract: A method and system control the adding or dropping of phases in a multiphase voltage regulator. The regulator has an efficiency and this efficiency of the regulator is calculated for a given number of phases being activated from an output voltage, input voltage, output current, and duty cycle of the regulator. The efficiency of the regulator is also calculated if a phase is added using the derivative of the duty cycle as a function of the output current. The efficiency of the regulator is further calculated if a phase is dropped using the derivative of the duty cycle as a function of the output current. From these operations of calculating, a phase is either added, dropped, or the phase is maintained at its current value to thereby optimize the efficiency of the regulator.

Abstract: A voltage regulator generates a regulated output voltage responsive to an input voltage and drive control signals. An error amplifier generates an error voltage signal responsive to the regulated output voltage and a reference voltage. A PWM modulator generates a PWM control signal responsive to the error voltage signal, a ramp voltage and an inverse of the reference voltage. Control circuitry within the PWM modulator maintains the error voltage signal applied to the PWM modulator at substantially a same DC voltage level over the reference voltage operating range and maintains the error voltage signal above a minimum value of the ramp voltage. Driver circuitry generates the drive control signals responsive to the PWM control signal.

Abstract: A control circuit for generating a control signal to add phases to a multiphase voltage regulator. The control circuit includes an input for receiving an error correction voltage from an error amplifier of the multiphase voltage regulator and at least one output for providing a PWM control signal. Control circuitry generates at least one PWM control signal to add a phase to the multiphase voltage regulator responsive to a determination that the error correction voltage has exceeded a threshold level.

Abstract: An embodiment of an inductor assembly includes a core, a first conductor, and a second conductor. The core includes first and second members, a first group of one or more forms extending between the members, a second group of one or more forms extending between the members, and an isolating region that magnetically isolates the first group of forms from the second group of forms. The first conductor is wound about a first one of the forms in the first group, and the second conductor is wound about a second one of the forms in the second group. Such an inductor assembly may allow both coupled and uncoupled inductors to be disposed on a common core, thus potentially reducing the cost and size of the inductors as compared to the coupled inductors being disposed on one core and the uncoupled inductors being disposed on another core.

Abstract: A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator and being operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal and includes a synchronous output switch having a phase node therebetween controlled by the gate driver, and also including regulator input current measurement circuitry. The regulator input current measurement circuitry includes a circuit that provides a signal representative of at least one phase node timing parameter. A sensing circuit is operable to sense inductor or output current provided by the regulator. A calculation circuit is coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current from the phase node timing parameters and the inductor or output current.

Abstract: An embodiment of an inductor assembly includes a core, a first conductor, and a second conductor. The core includes first and second members, a first group of one or more forms extending between the members, a second group of one or more forms extending between the members, and an isolating region that magnetically isolates the first group of forms from the second group of forms. The first conductor is wound about a first one of the forms in the first group, and the second conductor is wound about a second one of the forms in the second group. Such an inductor assembly may allow both coupled and uncoupled inductors to be disposed on a common core, thus potentially reducing the cost and size of the inductors as compared to the coupled inductors being disposed on one core and the uncoupled inductors being disposed on another core.

Abstract: A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal, and a synchronous output switch having a phase node there between controlled by the gate driver, and regulator input current measurement circuitry. The regulator input current measurement circuitry comprises a circuit operable for providing a signal representative of at least one phase node timing parameter, a sensing circuit operable for sensing inductor or output current provided by the regulator, and a calculation circuit coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current.

Abstract: A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal, and a synchronous output switch having a phase node there between controlled by the gate driver, and regulator input current measurement circuitry. The regulator input current measurement circuitry comprises a circuit operable for providing a signal representative of at least one phase node timing parameter, a sensing circuit operable for sensing inductor or output current provided by the regulator, and a calculation circuit coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current.