Patents by Inventor Michael John Henrichs

Michael John Henrichs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for accelerated format translation of data in a delimited data format
    Patent number: 11789965
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a structured format such as a fixed field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: October 17, 2023
    Assignee: IP Reservoir, LLC
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Method and apparatus for accelerated format translation of data in a delimited data format
    Patent number: 10949442
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a mapped variable field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: March 16, 2021
    Assignee: IP Reservoir, LLC
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Method and Apparatus for Accelerated Format Translation of Data in a Delimited Data Format
    Publication number: 20200242126
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a structured format such as a fixed field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Application
    Filed: April 13, 2020
    Publication date: July 30, 2020
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Method and apparatus for accelerated format translation of data in a delimited data format
    Patent number: 10621192
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a fixed field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: April 14, 2020
    Assignee: IP Resevoir, LLC
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Method and Apparatus for Accelerated Format Translation of Data in a Delimited Data Format
    Publication number: 20190108177
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a mapped variable field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Application
    Filed: November 29, 2018
    Publication date: April 11, 2019
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Method and apparatus for accelerated format translation of data in a delimited data format
    Patent number: 10146845
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a mapped variable field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: December 4, 2018
    Assignee: IP RESERVOIR, LLC
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Method and apparatus for accelerated data translation using record layout detection
    Patent number: 10102260
    Abstract: Various methods and apparatuses are described for performing high speed translations of data. In an example embodiment, record layout detection can be performed for data. In another example embodiment, data pivoting prior to field-specific data processing can be performed.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: October 16, 2018
    Assignee: IP RESERVOIR, LLC
    Inventors: Joseph M. Lancaster, Michael John Henrichs, Terry Tidwell, Alex St. John, Kevin Brian Sprague
  • Method and Apparatus for Accelerated Format Translation of Data in a Delimited Data Format
    Publication number: 20170220655
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a fixed field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Application
    Filed: April 17, 2017
    Publication date: August 3, 2017
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Method and apparatus for accelerated format translation of data in a delimited data format
    Patent number: 9633093
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a fixed field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: April 25, 2017
    Assignee: IP Reservoir, LLC
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Method and Apparatus for Accelerated Data Translation Using Record Layout Detection
    Publication number: 20150310077
    Abstract: Various methods and apparatuses are described for performing high speed translations of data. In an example embodiment, record layout detection can be performed for data. In another example embodiment, data pivoting prior to field-specific data processing can be performed.
    Type: Application
    Filed: April 23, 2015
    Publication date: October 29, 2015
    Inventors: Joseph M. Lancaster, Michael John Henrichs, Terry Tidwell, Alex St. John, Kevin Brian Sprague
  • Method and Apparatus for Accelerated Format Translation of Data in a Delimited Data Format
    Publication number: 20140114929
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a mapped variable field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Application
    Filed: October 22, 2013
    Publication date: April 24, 2014
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell
  • Method and Apparatus for Accelerated Format Translation of Data in a Delimited Data Format
    Publication number: 20140114908
    Abstract: Various methods and apparatuses are described for performing high speed format translations of incoming data, where the incoming data is arranged in a delimited data format. As an example, the data in the delimited data format can be translated to a fixed field format using pipelined operations. A reconfigurable logic device can be used in exemplary embodiments as a platform for the format translation.
    Type: Application
    Filed: October 22, 2013
    Publication date: April 24, 2014
    Inventors: Michael John Henrichs, Joseph M. Lancaster, Roger Dean Chamberlain, Jason R. White, Kevin Brian Sprague, Terry Tidwell