Abstract: Embodiments are for processor cross-core cache line contention management. A computer-implemented method includes sending a cross-invalidate command to one or more caches based on receiving a cache state change request for a cache line in a symmetric multiprocessing system and determining a retry delay based on receiving a cross-invalidate reject response from at least one of the one or more caches. The computer-implemented method also includes waiting until a retry delay period associated with the retry delay has elapsed to resend the cross-invalidate command to the one or more caches and granting the cache state change request for the cache line based on receiving a cross-invalidate accept response from the one or more caches.

Abstract: The method and systems described herein provide for identifying and mitigating undesirable power or voltage fluctuations in regions of a semiconductor device. For example, embodiments include detecting a region, such as an individual processor, of a processor chip is exhibiting a reduced power draw and a resulting localized voltage spike (e.g., a spike that exceeds Vmax) that would accelerate overall device end-of-life (EOL). The described systems respond by activating circuits or current generators located in the given region to draw additional power via a protective current. The protective current lowers the local voltages spikes back to within some pre-specified range (e.g., below a Vmax). The resulting reduction in the time above Vmax in testing reduces the number of devices that will need to be discarded due to Vmax violations as well as increases the expected reliability and lifespan of the device in operation.

Abstract: The method and systems described herein provide for identifying and mitigating undesirable power or voltage fluctuations in regions of a semiconductor device. For example, embodiments include detecting a region, such as an individual processor, of a processor chip is exhibiting a reduced power draw and a resulting localized voltage spike (e.g., a spike that exceeds Vmax) that would accelerate overall device end-of-life (EOL). The described systems respond by activating circuits or current generators located in the given region to draw additional power via a protective current. The protective current lowers the local voltages spikes back to within some pre-specified range (e.g., below a Vmax). The resulting reduction in the time above Vmax in testing reduces the number of devices that will need to be discarded due to Vmax violations as well as increases the expected reliability and lifespan of the device in operation.