Patents by Inventor Michael Juerss

Michael Juerss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210166998
    Abstract: A molded semiconductor package includes a lead frame having one or more first leads monolithically formed with a die pad and extending outward from the pad in a first direction. A semiconductor die is attached to the die pad at a first side of the die. A metal clip of a clip frame is attached to a power terminal at a second side of the die. One or more second leads monolithically formed with the metal clip extend outward from the clip in a second direction different than the first direction. A mold compound embeds the die. The first lead(s) and the second lead(s) are exposed at different sides of the mold compound and do not vertically overlap with one another. Within the mold compound, the clip transitions from a first level above the power terminal to a second level in a same plane as the leads.
    Type: Application
    Filed: February 16, 2021
    Publication date: June 3, 2021
    Inventors: Thorsten Scharf, Martin Gruber, Josef Hoeglauer, Michael Juerss, Josef Maerz, Thorsten Meyer, Bun Kian Tay
  • Patent number: 10964628
    Abstract: A molded semiconductor package includes a lead frame having one or more first leads monolithically formed with a die pad and extending outward from the pad in a first direction. A semiconductor die is attached to the die pad at a first side of the die. A metal clip of a clip frame is attached to a power terminal at a second side of the die. One or more second leads monolithically formed with the metal clip extend outward from the clip in a second direction different than the first direction. A mold compound embeds the die. The first lead(s) and the second lead(s) are exposed at different sides of the mold compound and do not vertically overlap with one another. Within the mold compound, the clip transitions from a first level above the power terminal to a second level in a same plane as the leads.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: March 30, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thorsten Scharf, Martin Gruber, Josef Hoeglauer, Michael Juerss, Josef Maerz, Thorsten Meyer, Bun Kian Tay
  • Patent number: 10886186
    Abstract: A semiconductor package system comprises a semiconductor package and a cap. The semiconductor package comprises a die pad, a chip mounted or arranged to a first main face of the die pad and an encapsulation body encapsulating the chip and the die pad. The cap covers at least partly an exposed second main face of the die pad. The cap comprises a cap body of an electrically insulating and thermally conductive material and a fastening system fastening the cap to the semiconductor package. The fastening system extends from the cap body towards the encapsulation body or along a side surface of the semiconductor package.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: January 5, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thorsten Scharf, Ralf Otremba, Thomas Bemmerl, Irmgard Escher-Poeppel, Martin Gruber, Michael Juerss, Thorsten Meyer, Xaver Schloegel
  • Publication number: 20200273781
    Abstract: A molded semiconductor package includes a lead frame having one or more first leads monolithically formed with a die pad and extending outward from the pad in a first direction. A semiconductor die is attached to the die pad at a first side of the die. A metal clip of a clip frame is attached to a power terminal at a second side of the die. One or more second leads monolithically formed with the metal clip extend outward from the clip in a second direction different than the first direction. A mold compound embeds the die. The first lead(s) and the second lead(s) are exposed at different sides of the mold compound and do not vertically overlap with one another. Within the mold compound, the clip transitions from a first level above the power terminal to a second level in a same plane as the leads.
    Type: Application
    Filed: February 21, 2019
    Publication date: August 27, 2020
    Inventors: Thorsten Scharf, Martin Gruber, Josef Hoeglauer, Michael Juerss, Josef Maerz, Thorsten Meyer, Bun Kian Tay
  • Publication number: 20200273790
    Abstract: A molded semiconductor package includes a lead frame having one or more first leads monolithically formed with a die pad and extending outward from the pad in a first direction. A semiconductor die is attached to the die pad at a first side of the die. A metal clip of a clip frame is attached to a power terminal at a second side of the die. One or more second leads monolithically formed with the metal clip extend outward from the clip in a second direction different than the first direction. A mold compound embeds the die. The first lead(s) and the second lead(s) are exposed at different sides of the mold compound and do not vertically overlap with one another. Within the mold compound, the clip transitions from a first level above the power terminal to a second level in a same plane as the leads.
    Type: Application
    Filed: January 21, 2020
    Publication date: August 27, 2020
    Inventors: Bun Kian Tay, Mei Yih Goh, Martin Gruber, Josef Hoeglauer, Michael Juerss, Josef Maerz, Thorsten Meyer, Thorsten Scharf, Chee Voon Tan
  • Publication number: 20200075530
    Abstract: An electronic device with a multi-layer contact and a system is disclosed. In an embodiment, a semiconductor device includes a semiconductor substrate having a first electrode terminal located on a first surface and a second surface electrode terminal located on a second surface, the first surface being opposite to the second surface, an electrical contact layer disposed directly on the first electrode terminal, a functional layer directly disposed on the electrical contact layer, an adhesion layer directly disposed on the functional layer, a solder layer directly disposed on the adhesion layer; and a protection layer directly disposed on the solder layer, wherein the semiconductor device is a power semiconductor device configured to provide a vertical current flow.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 5, 2020
    Inventors: Alexander Heinrich, Michael Juerss, Konrad Roesl, Oliver Eichinger, Kok Chai Goh, Tobias Schmidt
  • Publication number: 20200006187
    Abstract: A heat dissipation device includes a first part having a first material and a surface portion, and a second part on the surface portion. The second part has a second material and a porosity.
    Type: Application
    Filed: June 26, 2019
    Publication date: January 2, 2020
    Inventors: Ralf Otremba, Irmgard Escher-Poeppel, Martin Gruber, Michael Juerss, Thorsten Scharf
  • Patent number: 10475761
    Abstract: A method for producing an electric device with a multi-layer contact is disclosed. In an embodiment, a method includes providing a carrier, the carrier having a metallic layer disposed on its surface, providing a semiconductor substrate, forming a layer stack on the semiconductor substrate and attaching the layer stack of the semiconductor substrate to the metallic layer of the carrier so that an intermetallic phase is formed between the metallic layer and the solder layer.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: November 12, 2019
    Assignee: Infineon Technologies AG
    Inventors: Alexander Heinrich, Michael Juerss, Konrad Roesl, Oliver Eichinger, Kok Chai Goh, Tobias Schmidt
  • Publication number: 20190304858
    Abstract: A semiconductor package system comprises a semiconductor package and a cap. The semiconductor package comprises a die pad, a chip mounted or arranged to a first main face of the die pad and an encapsulation body encapsulating the chip and the die pad. The cap covers at least partly an exposed second main face of the die pad. The cap comprises a cap body of an electrically insulating and thermally conductive material and a fastening system fastening the cap to the semiconductor package. The fastening system extends from the cap body towards the encapsulation body or along a side surface of the semiconductor package.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 3, 2019
    Applicant: Infineon Technologies AG
    Inventors: Thorsten Scharf, Ralf Otremba, Thomas Bemmerl, Irmgard Escher-Poeppel, Martin Gruber, Michael Juerss, Thorsten Meyer, Xaver Schloegel
  • Publication number: 20190006311
    Abstract: A method for producing an electric device with a multi-layer contact is disclosed. In an embodiment, a method includes providing a carrier, the carrier having a metallic layer disposed on its surface, providing a semiconductor substrate, forming a layer stack on the semiconductor substrate and attaching the layer stack of the semiconductor substrate to the metallic layer of the carrier so that an intermetallic phase is formed between the metallic layer and the solder layer.
    Type: Application
    Filed: September 10, 2018
    Publication date: January 3, 2019
    Inventors: Alexander Heinrich, Michael Juerss, Konrad Roesl, Oliver Eichinger, Kok Chai Goh, Tobias Schmidt
  • Publication number: 20180350780
    Abstract: An electronic device package includes a semiconductor chip having a contact pad on a main face of the semiconductor chip, a contact element disposed on the contact pad, a dielectric layer disposed on the semiconductor chip and the contact element, and an encapsulant disposed onto the dielectric layer.
    Type: Application
    Filed: July 27, 2018
    Publication date: December 6, 2018
    Inventors: Edward Fuergut, Holger Doepke, Olaf Hohlfeld, Michael Juerss
  • Patent number: 10043782
    Abstract: A method for fabricating an electronic device package includes providing a carrier, disposing a semiconductor chip onto the carrier, the semiconductor chip having a contact pad on a main face thereof remote from the carrier, applying a contact element onto the contact pad, applying a dielectric layer on the carrier, the semiconductor chip, and the contact element, and applying an encapsulant onto the dielectric layer.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: August 7, 2018
    Assignee: Infineon Technologies AG
    Inventors: Edward Fuergut, Holger Doepke, Olaf Hohlfeld, Michael Juerss
  • Patent number: 9953952
    Abstract: A semiconductor device includes a carrier, a chip attached to the carrier, a sealant vapor deposited over the chip and the carrier, and encapsulation material deposited over the sealed chip and the sealed carrier.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: April 24, 2018
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Michael Juerss, Stefan Landau
  • Publication number: 20170287880
    Abstract: A method for fabricating an electronic device package includes providing a carrier, disposing a semiconductor chip onto the carrier, the semiconductor chip having a contact pad on a main face thereof remote from the carrier, applying a contact element onto the contact pad, applying a dielectric layer on the carrier, the semiconductor chip, and the contact element, and applying an encapsulant onto the dielectric layer.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 5, 2017
    Inventors: Edward Fuergut, Holger Doepke, Olaf Hohlfeld, Michael Juerss
  • Publication number: 20170025375
    Abstract: An electric device with a multi-layer contact is disclosed. In an embodiment, the electronic device includes a carrier, a semiconductor substrate attached to the carrier, and a layer system disposed between the semiconductor substrate and the carrier. The layer system includes an electrical contact layer disposed on the semiconductor substrate. A functional layer is disposed on the electrical contact layer. An adhesion layer is disposed on the functional layer. A solder layer is disposed between the adhesion layer and the carrier.
    Type: Application
    Filed: September 30, 2016
    Publication date: January 26, 2017
    Inventors: Alexander Heinrich, Michael Juerss, Konrad Roesl, Oliver Eichinger, Kok Chai Goh, Tobias Schmidt
  • Patent number: 9490193
    Abstract: The electronic device includes a carrier, a semiconductor substrate attached to the carrier, and a layer system disposed between the semiconductor substrate and the carrier. The layer system includes an electrical contact layer disposed on the semiconductor substrate. A functional layer is disposed on the electrical contact layer. An adhesion layer is disposed on the functional layer. A solder layer is disposed between the adhesion layer and the carrier.
    Type: Grant
    Filed: December 1, 2011
    Date of Patent: November 8, 2016
    Assignee: Infineon Technologies AG
    Inventors: Alexander Heinrich, Michael Juerss, Konrad Roesl, Oliver Eichinger, Kok Chai Goh, Tobias Schmidt
  • Publication number: 20160126165
    Abstract: A method of connecting a substrate is provided, wherein the substrate may include a first main surface and a second main surface opposite the first main surface. The method may include forming at least one protrusion on the first main surface of the substrate, forming a fixing agent over the first main surface of the substrate and over the at least one protrusion; and arranging the substrate on a carrier. The at least one protrusion may contact a surface of the carrier and may be configured to keep the first main surface of the substrate at a distance to the contacted surface of the carrier corresponding to a height of the protrusion, thereby forming a space between the first main surface of the substrate and the carrier. During the arranging the substrate on the carrier, at least a part of the fixing agent formed over the at least one protrusion may be displaced into the space between the first main surface of the substrate and the carrier.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 5, 2016
    Inventors: Paul FRANK, Alexander HEINRICH, Michael JUERSS, Chiong Yong TAY
  • Publication number: 20130140685
    Abstract: The electronic device includes a carrier, a semiconductor substrate attached to the carrier, and a layer system disposed between the semiconductor substrate and the carrier. The layer system includes an electrical contact layer disposed on the semiconductor substrate. A functional layer is disposed on the electrical contact layer. An adhesion layer is disposed on the functional layer. A solder layer is disposed between the adhesion layer and the carrier.
    Type: Application
    Filed: December 1, 2011
    Publication date: June 6, 2013
    Applicant: Infineon Technologies AG
    Inventors: Alexander Heinrich, Michael Juerss, Konrad Roesl, Oliver Eichinger, Kok Chai Goh, Tobias Schmidt
  • Publication number: 20100044841
    Abstract: A semiconductor device includes a carrier, a chip attached to the carrier, a sealant vapor deposited over the chip and the carrier, and encapsulation material deposited over the sealed chip and the sealed carrier.
    Type: Application
    Filed: August 20, 2008
    Publication date: February 25, 2010
    Applicant: Infineon Technologies AG
    Inventors: Joachim Mahler, Michael Juerss, Stefan Landau