Abstract: Stacked, multimodular circuit assemblies are provided which comprise stacked, resealable, modules containing electronic circuitry, each module having a plurality of electrically conductive, embedded through-vias between the upper and major surfaces thereof. The through-vias are contained within the module matrix outside of the circuit-containing cavity or "tub" of the module and within the outer edges of the module body. Electronic circuitry contained in the module cavity is electrically connected to the through-vias by signal traces or vias passing out of the cavity and into contact with the through-vias, and adjacent modules are electrically interconnected by a resealable, multichannel connector array between adjacent modules having electrically conductive channels coupling opposing through-vias of the adjacent modules.

Abstract: An integrated stack of layers incorporating a plurality of IC chip layers has an end layer which is formed of dielectric material (or covered with such material). The outer surface of the end layer provides a substantial area for the spaced location of a multiplicity of lead-out terminals, to which exterior circuitry can be readily connected. In the preferred embodiment, each lead-out terminal on the outer surface of the end layer is connected to IC circuitry embedded in the stack by means of conducting material in a hole through the end layer, and a conductor (trace) on the inner surface of the end layer which extends from the hole to the edge of the end layer, where it is connected by a T-connect to metalization on the access plane face of the stack.