Abstract: A plurality of modules each including at least a pair of series connected power MOSFETs are configured between a plurality of DC voltage sources, and a plurality output terminals for connection to respective loads, are controlled for selectively applying power to the loads via time delay switching incorporating forward biased intrinsic diodes of the MOSFETs in a given current path during initial application of power to a load, whereby a predetermined period of time after turning on one of the series connected MOSFETs, the associated other MOSFET is turned on to shunt its intrinsic diode for reducing the resistance in the current path to maximize current flow. The configuration of the plurality of power MOSFETs is also controlled for selectively providing bi-directional current flow between said plurality of DC voltage sources.

Abstract: A plurality of modules each including at least a pair of series connected power MOSFETs are configured between a plurality of DC voltage sources, and a plurality output terminals for connection to respective loads, are controlled for selectively applying power to the loads via time delay switching incorporating forward biased intrinsic diodes of the MOSFETs in a given current path during initial application of power to a load, whereby a predetermined period of time after turning on one of the series connected MOSFETs, the associated other MOSFET is turned on to shunt its intrinsic diode for reducing the resistance in the current path to maximize current flow. The configuration of the plurality of power MOSFETs is also controlled for selectively providing bi-directional current flow between said plurality of DC voltage sources.

Abstract: A plurality of modules each including at least a pair of series connected power MOSFETs are configured between a plurality of DC voltage sources, and a plurality output terminals for connection to respective loads, are controlled for selectively applying power to the loads via time delay switching incorporating forward biased intrinsic diodes of the MOSFETs in a given current path during initial application of power to a load, whereby a predetermined period of time after turning on one of the series connected MOSFETs, the associated other MOSFET is turned on to shunt its intrinsic diode for reducing the resistance in the current path to maximize current flow. The configuration of the plurality of power MOSFETs is also controlled for selectively providing bi-directional current flow between said plurality of DC voltage sources.

Abstract: A plurality of modules each including at least a pair of series connected power MOSFETs are configured between a plurality of DC voltage sources, and a plurality output terminals for connection to respective loads, are controlled for selectively applying power to the loads via time delay switching incorporating forward biased intrinsic diodes of the MOSFETs in a given current path during initial application of power to a load, whereby a predetermined period of time after turning on one of the series connected MOSFETs, the associated other MOSFET is turned on to shunt its intrinsic diode for reducing the resistance in the current path to maximize current flow. The configuration of the plurality of power MOSFETs is also controlled for selectively providing bi-directional current flow between said plurality of DC voltage sources.

Abstract: A plurality of modules each including at least a pair of series connected power MOSFETs are configured between a plurality of DC voltage sources, and a plurality output terminals for connection to respective loads, are controlled for selectively applying power to the loads via time delay switching incorporating forward biased intrinsic diodes of the MOSFETs in a given current path during initial application of power to a load, whereby a predetermined period of time after turning on one of the series connected MOSFETs, the associated other MOSFET is turned on to shunt its intrinsic diode for reducing the resistance in the current path to maximize current flow. The configuration of the plurality of power MOSFETs is also controlled for selectively providing bi-directional current flow between said plurality of DC voltage sources.

Abstract: A signal conditioning circuit reduces an interferrometric fiber optic gyro (IFOG) noise, the IFOG including a light source, Integrated Optics Chips (IOC) and a coupler to output an optical power signal corresponding to a rotation-induced phase shift in a fiber coil of the IFOG. The signal conditioning circuit includes a photodiode that converts the optical power signal to a corresponding electrical compensation signal and one or more switched integrators that receive and process the electrical compensation signal by selectively switching between a plurality of modes of each one of the one or more switched integrators. A method of signal conditioning in the IFOG to reduce IFOG noise includes the steps of converting the optical power signal to a corresponding electrical compensation signal and selectively integrating a current of the electrical compensation signal using at least one switched integrator.

Abstract: A noise reducing thermal-electrically cooled photodetector for an Interferrometric Fiber Optic Gyro (IFOG) includes a photodiode that converts an optical power signal received from a coupler of the IFOG to an electrical compensation signal. The photodiode is in mechanical contact with one or more thermoelectric coolers (TEC) to lower an operating temperature of the photodiode. The photodetector also includes an amplifier circuit to amplify the electrical compensation signal. The amplifier circuit includes an operational amplifier having an input and an output, with a feedback resistor interposed between the input and output. The feedback resistor is also in mechanical contact with a TEC to lower an operating temperature of the feedback resistor. By reducing the operating temperature of the feedback resistor and the photodiode the thermal noise of the IFOG is reduced.

Abstract: An integrated fault circuit includes a fault switch interposed between an input power source and an electronic subsystem power bus. A power converter is connected to the electronic subsystem power bus and converts power derived therefrom to at least one voltage output to supply power to an electronic subsystem and at least one fault protection output controlling the fault switch. A fault detection circuit is operatively connected to detect an out of range current on the electronic subsystem power bus and has at least one fault detection output connected to the power converter. When the out of range current is detected on the electronic subsystem bus, the fault detection circuit instructs the power converter, via the at least one fault detection output, to open the fault switch, thereby isolating the input power from the electronic subsystem bus.

Abstract: A current regulator for a laser tube used in a ring laser gyroscope includes a ballast resistor coupled to the laser tube's anode, an output for the current, such as a current sensing resistor, a current source coupled between the ballast resistor and the output, a control circuit that establishes the amount of current flow through the current regulator, and a voltage divider that senses the voltage across the current source. The current source includes two transistors coupled in series and the voltage divider generates a voltage level that is half the sensed voltage differential and supplies the generated voltage level to one of the transistors so as to control the voltage drop across that transistor to be the same as the voltage drop across the other transistor. The current source may include more than two transistors in series and the voltage drops across the transistors are controlled to be the same.

Abstract: A system for minimizing non-linearity in an Interferometric Fiber Optic Gyro (IFOG) that includes a light source, an Integrated Optics Chip (IOC) with first and second optical modulators, and a coupler to output an optical power signal corresponding to a rotation-induced phase shift in a fiber coil of the IFOG to processing electronics of the IFOG. The processing electronics include signal processing means to produce a digital signal corresponding to the optical power signal. A first digital-to-analog converter (DAC) receives the digital signal and provides a corresponding first modulation signal to the first optical modulator via a first amplifier. However, the first DAC and first optical modulator inherently introduce non-linearities into the first modulation signal. A second DAC receives the digital signal and provides a corresponding second modulation signal to the second optical modulator via a second amplifier.

Abstract: A noise reducing thermal-electrically cooled photodetector for an Interferrometric Fiber Optic Gyro (IFOG) includes a photodiode that converts an optical power signal received from a coupler of the IFOG to an electrical compensation signal. The photodiode is in mechanical contact with one or more thermoelectric coolers (TEC) to lower an operating temperature of the photodiode. The photodetector also includes an amplifier circuit to amplify the electrical compensation signal. The amplifier circuit includes an operational amplifier having an input and an output, with a feedback resistor interposed between the input and output. The feedback resistor is also in mechanical contact with a TEC to lower an operating temperature of the feedback resistor. By reducing the operating temperature of the feedback resistor and the photodiode the thermal noise of the IFOG is reduced.

Abstract: A signal conditioning circuit reduces an interferrometric fiber optic gyro (IFOG) noise, the IFOG including a light source, Integrated Optics Chips (IOC) and a coupler to output an optical power signal corresponding to a rotation-induced phase shift in a fiber coil of the IFOG. The signal conditioning circuit includes a photodiode that converts the optical power signal to a corresponding electrical compensation signal and one or more switched integrators that receive and process the electrical compensation signal by selectively switching between a plurality of modes of each one of the one or more switched integrators. A method of signal conditioning in the IFOG to reduce IFOG noise includes the steps of converting the optical power signal to a corresponding electrical compensation signal and selectively integrating a current of the electrical compensation signal using at least one switched integrator.

Abstract: An excitation circuit is disclosed for balancing the phase voltages in a two phase motor. The excitation circuit includes a first and second switch and a port for receiving a signal to drive the switches. The excitation circuit also includes additional electrical circuitry which can be designed to adjust the speed and timing of the first and second switches and balance the phase voltages in the two phase motor.

Abstract: Flux information in a magnetic circuit such as may be used for rate damping and vibration suppression in a magnetic forcer system is sensed and is used in conjunction with a differentiated forcer position signal to provide a rate damping signal. The sensed magnetic flux is used to synthesize an inertial velocity signal which is applied as a position rate damping input to a closed position control loop.

Abstract: An arrangement for obtaining flux rate information in a magnetic: circuit including passive means connected across a flux rate sensor for implementing control of said flux rate. The passive means being a tuned magnetic flux rate feedback sensing and control arrangement wherein impedance is tuned and the energy loss characteristic is adjustable. The selection of inductance and capacitance values provides tuning and the selection of resistance affects the energy loss characteristics.

Abstract: An arrangement using sensing coils for obtaining flux rate of change information in a magnetic circuit. The arrangement can be used for vibration attenuation in a magnetic forcer system. Active (electric powered) circuitry is used to implement closed loop control of flux rate. The control loop is "tuned" for attenuating a narrow range of vibration frequencies. The arrangement can be applied to magnetic forcer/suspension systems in which vibrations due to magnetic, mechanical/magnetic runouts, system mechanical resonances, or external vibration sources are present.

Abstract: An arrangement using sensing coils for obtaining flux rate of change information in a magnetic circuit. The arrangement can be used for vibration attenuation in a magnetic forcer system. Active (electric powered) circuitry is used to implement closed loop control of flux rate. The control loop is "broadband" since a broad range of vibration frequencies are attenuated. The arrangement can be applied to magnetic forcer/suspension systems in which vibrations due to magnetic mechanical/magnetic runouts, system mechanical resonances, or external vibration sources are present. The arrangement is particularly applicable for systems with a large number of varying vibration frequencies.