Patents by Inventor Michael Kocsis
Michael Kocsis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240118614Abstract: Multiple patterning approaches using radiation sensitive organometallic materials is described. In particular, multiple patterning approaches can be used to provide distinct multiple patterns of organometallic material on a hardmask or other substrate through a sequential approach that leads to a final pattern. The multiple patterning approach may proceed via sequential lithography steps with multiple organometallic layers and may involve a hardbake freezing after development of each pattern. Use of an organometallic resist with dual tone properties to perform pattern cutting and multiple patterning of a single organometallic layer are described. Corresponding structures are also described.Type: ApplicationFiled: December 20, 2023Publication date: April 11, 2024Inventors: Peter De Schepper, Jason K. Stowers, Sangyoon Woo, Michael Kocsis, Alan J. Telecky
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Patent number: 11886116Abstract: Multiple patterning approaches using radiation sensitive organometallic materials is described. In particular, multiple patterning approaches can be used to provide distinct multiple patterns of organometallic material on a hardmask or other substrate through a sequential approach that leads to a final pattern. The multiple patterning approach may proceed via sequential lithography steps with multiple organometallic layers and may involve a hardbake freezing after development of each pattern. Use of an organometallic resist with dual tone properties to perform pattern cutting and multiple patterning of a single organometallic layer are described. Corresponding structures are also described.Type: GrantFiled: May 4, 2021Date of Patent: January 30, 2024Assignee: Inpria CorporationInventors: Peter de Schepper, Jason K. Stowers, Sangyoon Woo, Michael Kocsis, Alan J. Telecky
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Publication number: 20230012169Abstract: A rinse process is described for processing an initially patterned structure formed with an organometallic radiation sensitive material, in which the rinse process can remove portions of the composition remaining after pattern development to make the patterned structure more uniform such that a greater fraction of patterned structures can meet specifications. The radiation sensitive material can comprise alkyl tin oxide hydroxide compositions. The rinsing process can be effectively used to improve patterning of fine structures using extreme ultraviolet light.Type: ApplicationFiled: September 8, 2022Publication date: January 12, 2023Inventors: Michael Kocsis, Peter De Schepper, Michael Greer, Shu-Hao Chang
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Patent number: 11480874Abstract: A rinse process is described for processing an initially patterned structure formed with an organometallic radiation sensitive material, in which the rinse process can remove portions of the composition remaining after pattern development to make the patterned structure more uniform such that a greater fraction of patterned structures can meet specifications. The radiation sensitive material can comprise alkyl tin oxide hydroxide compositions. The rinsing process can be effectively used to improve patterning of fine structures using extreme ultraviolet light.Type: GrantFiled: October 16, 2019Date of Patent: October 25, 2022Assignee: Inpria CorporationInventors: Michael Kocsis, Peter De Schepper, Michael Greer, Shu-Hao Chang
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Publication number: 20210349390Abstract: Multiple patterning approaches using radiation sensitive organometallic materials is described. In particular, multiple patterning approaches can be used to provide distinct multiple patterns of organometallic material on a hardmask or other substrate through a sequential approach that leads to a final pattern. The multiple patterning approach may proceed via sequential lithography steps with multiple organometallic layers and may involve a hardbake freezing after development of each pattern. Use of an organometallic resist with dual tone properties to perform pattern cutting and multiple patterning of a single organometallic layer are described. Corresponding structures are also described.Type: ApplicationFiled: May 4, 2021Publication date: November 11, 2021Inventors: Peter de Schepper, Jason K. Stowers, Sangyoon Woo, Michael Kocsis, Alan J. Telecky
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Publication number: 20210011383Abstract: A method is described for stabilizing organometallic coating interfaces through the use of multilayer structures that incorporate an underlayer coating. The underlayer is composed of an organic polymer that has crosslinking and adhesion-promoting functional groups. The underlayer composition may include photoacid generators. Multilayer structures for patterning are described based on organometallic radiation sensitive patterning compositions, such as alkyl tin oxo hydroxo compositions, which are placed over a polymer underlayer.Type: ApplicationFiled: July 10, 2020Publication date: January 14, 2021Inventors: Brian J. Cardineau, Shu-Hao Chang, Jason K. Stowers, Michael Kocsis, Peter de Schepper
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Publication number: 20200326627Abstract: Developer compositions are described based on blends of solvents, in which the developers are particularly effective for EUV patterning using organometallic based patterning compositions. Methods for use of these developing compositions are described. The blends of solvents can be selected based on Hansen solubility parameters. Generally, one solvent has low polarity as express by the sum of ?P+?H, and a second solvent component of the developer has a higher value of ?P+?H. Corresponding solvent compositions are described.Type: ApplicationFiled: April 10, 2020Publication date: October 15, 2020Inventors: Kai Jiang, Brian J. Cardineau, Lauren B. McQuade, Jeremy T. Anderson, Stephen T. Meyers, Michael Kocsis, Amrit K. Narasimhan
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Publication number: 20200124970Abstract: A rinse process is described for processing an initially patterned structure formed with an organometallic radiation sensitive material, in which the rinse process can remove portions of the composition remaining after pattern development to make the patterned structure more uniform such that a greater fraction of patterned structures can meet specifications. The radiation sensitive material can comprise alkyl tin oxide hydroxide compositions. The rinsing process can be effectively used to improve patterning of fine structures using extreme ultraviolet light.Type: ApplicationFiled: October 16, 2019Publication date: April 23, 2020Inventors: Michael Kocsis, Peter De Schepper, Michael Greer, Shu-Hao Chang
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Patent number: 10490442Abstract: An example embodiment may include a method for blocking one or more portions of one or more trenches during manufacture of a semiconductor structure. The method may include (i) providing a substrate comprising one or more trenches, and a dielectric material under the one or more trenches, (ii) providing a first overlayer on the substrate, thereby filling the one or more trenches, the first overlayer having a planar top surface, a top portion of the first overlayer, comprising the top surface, being etchable selectively with respect to a condensed photo-condensable metal oxide, (iii) covering a first area of the top surface, situated directly above the one or more portions and corresponding thereto, with a block pattern of the condensed photo-condensable metal oxide, thereby leaving a second area of the top surface, having at least another portion of at least one of the trenches thereunder, uncovered.Type: GrantFiled: February 23, 2018Date of Patent: November 26, 2019Assignee: IMEC VZWInventors: Boon Teik Chan, Ming Mao, Peter De Schepper, Michael Kocsis
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Publication number: 20180240699Abstract: An example embodiment may include a method for blocking one or more portions of one or more trenches during manufacture of a semiconductor structure. The method may include (i) providing a substrate comprising one or more trenches, and a dielectric material under the one or more trenches, (ii) providing a first overlayer on the substrate, thereby filling the one or more trenches, the first overlayer having a planar top surface, a top portion of the first overlayer, comprising the top surface, being etchable selectively with respect to a condensed photo-condensable metal oxide, (iii) covering a first area of the top surface, situated directly above the one or more portions and corresponding thereto, with a block pattern of the condensed photo-condensable metal oxide, thereby leaving a second area of the top surface, having at least another portion of at least one of the trenches thereunder, uncovered.Type: ApplicationFiled: February 23, 2018Publication date: August 23, 2018Applicant: IMEC VZWInventors: Boon Teik Chan, Ming Mao, Peter De Schepper, Michael Kocsis
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Patent number: 9299845Abstract: Semiconductor devices on a diffusion barrier coated metal substrates, and methods of making the same are disclosed. The semiconductor devices include a metal substrate, a diffusion barrier layer on the metal substrate, an insulator layer on the diffusion barrier layer, and a semiconductor layer on the insulator layer. The method includes forming a diffusion barrier layer on the metal substrate, forming an insulator layer on the diffusion barrier layer; and forming a semiconductor layer on the insulator layer. Such diffusion barrier coated substrates prevent diffusion of metal atoms from the metal substrate into a semiconductor device formed thereon.Type: GrantFiled: May 28, 2010Date of Patent: March 29, 2016Assignee: Thin Film Electronics ASAInventors: Arvind Kamath, Michael Kocsis, Kevin McCarthy, Gloria Man Ting Wong
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Patent number: 9281207Abstract: Solution processible hardmasks are described that can be formed from aqueous precursor solutions comprising polyoxometal clusters and anions, such as polyatomic anions. The solution processible metal oxide layers are generally placed under relatively thin etch resist layers to provide desired etch contrast with underlying substrates and/or antireflective properties. In some embodiments, the metal oxide hardmasks can be used along with an additional hardmask and/or antireflective layers. The metal oxide hardmasks can be etched with wet or dry etching. Desirable processing improvements can be obtained with the solution processible hardmasks.Type: GrantFiled: February 28, 2012Date of Patent: March 8, 2016Assignee: Inpria CorporationInventors: Jason K. Stowers, Stephen T. Meyers, Michael Kocsis, Douglas A. Keszler, Andrew Grenville
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Patent number: 9183973Abstract: Devices on a diffusion barrier coated metal substrates, and methods of making the same are disclosed. The devices include a metal substrate, a diffusion barrier layer on the metal substrate, one or more insulator layers on the diffusion barrier layer, and an antenna and/or inductor on the one or more insulator layer(s). The method includes forming a diffusion barrier layer on the metal substrate, forming one or more insulator layers on the diffusion barrier layer; and forming an antenna and/or inductor on an uppermost one of the insulator layer(s). The antenna and/or inductor is electrically connected to at least one of the diffusion barrier layer and/or the metal substrate. Such diffusion barrier coated substrates prevent diffusion of metal atoms from the metal substrate into device layers formed thereon.Type: GrantFiled: April 29, 2013Date of Patent: November 10, 2015Assignee: Thin Film Electronics ASAInventors: Arvind Kamath, Michael Kocsis, Kevin McCarthy, Gloria Wong, Jiang Li
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Publication number: 20130243940Abstract: Devices on a diffusion barrier coated metal substrates, and methods of making the same are disclosed. The devices include a metal substrate, a diffusion barrier layer on the metal substrate, one or more insulator layers on the diffusion barrier layer, and an antenna and/or inductor on the one or more insulator layer(s). The method includes forming a diffusion barrier layer on the metal substrate, forming one or more insulator layers on the diffusion barrier layer; and forming an antenna and/or inductor on an uppermost one of the insulator layer(s). The antenna and/or inductor is electrically connected to at least one of the diffusion barrier layer and/or the metal substrate. Such diffusion barrier coated substrates prevent diffusion of metal atoms from the metal substrate into device layers formed thereon.Type: ApplicationFiled: April 29, 2013Publication date: September 19, 2013Inventors: Arvind KAMATH, Michael KOCSIS, Kevin MCCARTHY, Gloria WONG, Jiang LI
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Publication number: 20120223418Abstract: Solution processible hardmasks are described that can be formed from aqueous precursor solutions comprising polyoxometal clusters and anions, such as polyatomic anions. The solution processible metal oxide layers are generally placed under relatively thin etch resist layers to provide desired etch contrast with underlying substrates and/or antireflective properties. In some embodiments, the metal oxide hardmasks can be used along with an additional hardmask and/or antireflective layers. The metal oxide hardmasks can be etched with wet or dry etching. Desirable processing improvements can be obtained with the solution processible hardmasks.Type: ApplicationFiled: February 28, 2012Publication date: September 6, 2012Inventors: Jason K. Stowers, Stephen T. Meyers, Michael Kocsis, Douglas A. Keszler, Andrew Grenville
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Patent number: 8191018Abstract: Methods and software for correcting printable circuit layouts. The methods generally including steps of identifying shapes in an input circuit layout, applying a plurality of correction rules to the shapes, and producing an output printed circuit layout in accordance with the identified shapes and the correction rules. The input circuit layout generally comprises a bitmapped image or other description of at least one printable layer of at least one electronic component, device, or die. Embodiments of the present invention further allow for more precise control of spreading and effective coverage of features (e.g., source/drain terminal regions, gates, capacitors, diodes, interconnects, etc.) on a substrate by a printed ink composition including electronic materials.Type: GrantFiled: July 17, 2008Date of Patent: May 29, 2012Assignee: Kovio, Inc.Inventors: Steven Molesa, Erik Scher, Patrick Smith, Michael Kocsis
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Publication number: 20110017997Abstract: Semiconductor devices on a diffusion barrier coated metal substrates, and methods of making the same are disclosed. The semiconductor devices include a metal substrate, a diffusion barrier layer on the metal substrate, an insulator layer on the diffusion barrier layer, and a semiconductor layer on the insulator layer. The method includes forming a diffusion barrier layer on the metal substrate, forming an insulator layer on the diffusion barrier layer; and forming a semiconductor layer on the insulator layer. Such diffusion barrier coated substrates prevent diffusion of metal atoms from the metal substrate into a semiconductor device formed thereon.Type: ApplicationFiled: May 28, 2010Publication date: January 27, 2011Inventors: Arvind Kamath, Michael Kocsis, Kevin McCarthy, Gloria Man Ting Wong
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Publication number: 20080213689Abstract: A method is disclosed for lithographic processing. In one aspect, the method comprises obtaining a resist material with predetermined resist properties. The method further comprises using the resist material for providing a resist layer on the device to be lithographic processed. The method further comprises illuminating the resist layer according to a predetermined pattern to be obtained. The obtained resist material comprises a tuned photo-acid generator component and/or a tuned quencher component and/or a tuned acid mobility as to reduce watermark defects on the lithographic processed device. In another aspect, a corresponding resist material, a set of resist materials, use of such materials and a method for setting up a lithographic process are disclosed.Type: ApplicationFiled: September 27, 2007Publication date: September 4, 2008Applicant: Interuniversitair Microelektronica Centrum (IMEC) vzwInventors: Michael Kocsis, Roel Gronheid, Akimasa Soyano
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Patent number: 6087733Abstract: A method and apparatus for compensating for the effects of nonuniform planarization in chemical-mechanical polishing (CMP) such as the erosion occurring from the removal of titanium nitride/tungsten films is disclosed. In the context of alignment marks, dummy marks are disposed on both sides of the actual alignment marks providing a similar feature density as the alignment marks. During the CMP, the dummy marks reside in the area of nonuniform erosion, leaving the actual marks in an area of uniform erosion. The present invention may also be used to control underlayer erosion variations in the high feature density device areas adjacent to the low feature density open areas by providing dummy features in the low feature density areas.Type: GrantFiled: June 12, 1998Date of Patent: July 11, 2000Assignee: Intel CorporationInventors: Michael A. Maxim, Michael Kocsis, Ning Hsieh, Matthew Prince, Kenneth C. Cadien