Abstract: Systems and methods for minimizing performance degradation due to component mismatch in the feedback path of a digital PWM amplifier feedback loop. One embodiment comprises a digital pulse width modulated (PWM) amplifier with feedback. The amplification subsystem receives a digital audio signal and produces an analog output signal. The feedback loop produces a feedback signal based on the filtered analog output signal and modifies the digital audio signal based on the feedback signal. The feedback loop includes a filter configured to filter the analog output signal and correction circuitry configured to correct component mismatch errors introduced by the filter. In one embodiment, the correction circuitry receives a measurement of a power supply voltage, multiplies the measured voltage by a gain and adds the scaled measurement to the feedback signal to correct for the component mismatch errors.

Abstract: A scan including data and shift inputs, and input selection circuitry for selecting between the data and shift inputs during normal, capture, and shift modes in response to only a first control signal and a second control signal. The input selection circuitry includes a first storage element for storing a bit representing a state of the first control signal in response to a change in state of the second control signals and multiplexing circuitry. The multiplexing circuitry is operable in the normal mode to select the data input in response to a first state of the second control signal, in the capture mode to select the data input when the bit stored in the first storage element represents a first state of the first control signal, and in the shift mode to select the shift input when the bit stored in the first storage element represents a second state of the first control signal.

Abstract: Systems and methods for minimizing performance degradation due to component mismatch in the feedback path of a digital PWM amplifier feedback loop. One embodiment comprises a digital pulse width modulated (PWM) amplifier with feedback. The amplification subsystem receives a digital audio signal and produces an analog output signal. The feedback loop produces a feedback signal based on the filtered analog output signal and modifies the digital audio signal based on the feedback signal. The feedback loop includes a filter configured to filter the analog output signal and correction circuitry configured to correct component mismatch errors introduced by the filter. In one embodiment, the correction circuitry receives a measurement of a power supply voltage, multiplies the measured voltage by a gain and adds the scaled measurement to the feedback signal to correct for the component mismatch errors.

Abstract: Systems and methods for preventing violations of minimum pulse width requirements that may cause damage to PWM amplifiers. One embodiment comprises a digital PWM amplifier that includes shutdown circuitry which is configured to identify blockout intervals during which deassertion of the PWM signals would cause the generation of below-minimum-width pulses in the signals. Each blockout interval may, for example, begin 1 minimum pulse width before and end 1 minimum pulse width after a rising/falling edge the PWM signals. If a shutdown signal is asserted (or deasserted) during one of the blockout intervals, the PWM signals are deasserted (or reasserted) at the end of the blockout interval.

Abstract: Systems and methods for minimizing errors due to component variation in switching amplifiers utilizing power supply feed forward techniques. One embodiment comprises a digital PWM amplifier having an amplification subsystem for receiving a digital audio signal and producing an analog output signal. The amplifier includes a power supply feed-forward path configured to modify the digital audio signal based on a power supply measurement. The feed-forward path includes an analog filter configured to filter the power supply measurement, as well as correction circuitry configured to correct component mismatch errors introduced by the filter. The power supply measurement may be a power supply difference, a power supply common mode, or both. In either case, the power supply measurement is corrected by multiplying the measurement by an appropriately scaled power supply difference.

Abstract: Systems and methods for transferring data across clock domains in a manner that avoids metastability of the data and is very tolerant of variations in the clock signals of the different clock domains. One embodiment of the invention comprises a mechanism for passing data from a first clock to a second clock domain in a digital pulse width modulated (PWM) amplification system. In this embodiment, parallel data is generated in the process of converting PCM data to PWM data. The parallel data is processed in a clock domain having a first clock rate and is passed to a second clock domain having a clock rate that is twice the rate of the first clock domain. The parallel data is then serialized at the higher clock rate of the second clock domain.

Abstract: Systems and methods for pulse width modulating waveforms to represent asymmetric signal levels using pulses that are symmetric within their respective switching periods. One embodiment comprises a pulse width modulation system including an asymmetric correction unit and a pair of modulators. The asymmetric correction unit receives samples of an input signal and produces two separate output signals for corresponding modulators. For each sample, the asymmetric correction unit determines whether the signal level of the sample is symmetric or asymmetric. If the signal level of the sample is symmetric, the sample is forwarded to each of the modulators. If the signal level is asymmetric, the asymmetric correction unit increases one modified sample to the next higher symmetric signal level and decreases another modified sample to the next lower symmetric signal level and forwards the modified samples to the modulators.

Abstract: Systems and methods for minimizing delay in a feedback path. In one embodiment, an analog-to-digital feedback path includes an analog-to-digital converter (ADC) configured to receive and digitize an analog signal such as an amplifier output to produce a serial digital output. A serial interface receives and parallelizes the serial digital output to produce a parallel data words that are provided to a processing unit such as a decimator. The processing unit processes the data words to produce a digital feedback signal which can then be used to modify an input signal, such as a digital audio input to the amplifier. A delay minimization subsystem is implemented in the feedback path to monitor a delay between generation of parallel data words by the serial interface and consumption of the parallel data words by the first processing unit. The delay minimization mechanism may be implemented in multiple channels of the feedback path.

Abstract: Systems and methods for over-current protection in all-digital amplifiers using low-cost current sensing mechanisms. An over-current hard clipping unit receives a digital audio signal, clips the signal according to a clip level, and provides the signal to a modulator. The modulator modulates the signal to produce, e.g., a PWM signal and provides the modulated signal to an output stage which generates an output current to drive a speaker. An over-current sensing unit is compares the output current to a threshold value and generates a binary signal indicating whether the output current exceeds the threshold value. The hard clipping unit receives the binary signal and ramps down the clip level during time periods in which the binary signal indicates that the output current exceeds the threshold. When the binary signal indicates that the output current does not exceed the threshold value, the hard clipping unit ramps up the clip level.

Abstract: Systems and methods for performance improvements in digital switching amplifiers using simulation-based feedback. In one embodiment, a digital pulse width modulation (PWM) amplifier includes a signal processing plant configured to receive and process an input audio signal. The amplifier also includes a simulator configured to model processing of audio signals by the plant. The outputs of the plant and the simulator are provided to a subtractor, the output of which is then added to the input audio signal as feedback. The plant may consist of a modulator and power switch, a noise shaper, or any other type of plant. An analog-to-digital converter (ADC) may be provided to convert the output audio signal to a digital signal for input to the subtractor. Filtering may be implemented before or after the ADC, and a decimator may be placed after the ADC if it is an oversampling ADC.

Abstract: Systems and methods for preventing violations of minimum pulse width requirements that may cause damage to PWM amplifiers. One embodiment comprises a digital PWM amplifier that includes shutdown circuitry which is configured to identify blockout intervals during which deassertion of the PWM signals would cause the generation of below-minimum-width pulses in the signals. Each blockout interval may, for example, begin 1 minimum pulse width before and end 1 minimum pulse width after a rising/falling edge the PWM signals. If a shutdown signal is asserted (or deasserted) during one of the blockout intervals, the PWM signals are deasserted (or reasserted) at the end of the blockout interval.

Abstract: Systems and methods for minimizing errors due to component variation in switching amplifiers utilizing power supply feed forward techniques. One embodiment comprises a digital PWM amplifier having an amplification subsystem for receiving a digital audio signal and producing an analog output signal. The amplifier includes a power supply feed-forward path configured to modify the digital audio signal based on a power supply measurement. The feed-forward path includes an analog filter configured to filter the power supply measurement, as well as correction circuitry configured to correct component mismatch errors introduced by the filter. The power supply measurement may be a power supply difference, a power supply common mode, or both. In either case, the power supply measurement is corrected by multiplying the measurement by an appropriately scaled power supply difference.

Abstract: Systems and methods for over-current protection in all-digital amplifiers using low-cost current sensing mechanisms. An over-current hard clipping unit receives a digital audio signal, clips the signal according to a clip level, and provides the signal to a modulator. The modulator modulates the signal to produce, e.g., a PWM signal and provides the modulated signal to an output stage which generates an output current to drive a speaker. An over-current sensing unit is compares the output current to a threshold value and generates a binary signal indicating whether the output current exceeds the threshold value. The hard clipping unit receives the binary signal and ramps down the clip level during time periods in which the binary signal indicates that the output current exceeds the threshold. When the binary signal indicates that the output current does not exceed the threshold value, the hard clipping unit ramps up the clip level.

Abstract: Systems and methods for improving the stability of feedback and/or feed-forward subsystems in digital amplifiers. One embodiment comprises a digital pulse width modulation (PWM) controller. The controller includes an input for receiving a digital audio input signal and is configured to generate a PWM output signal based on the input signal at an output. The controller also has control inputs for receiving external audio correction signals such as feedback and power supply feed-forward signals. The controller has correction circuitry for processing the received external control signals and modifying the input signal based on these signals. Fault detectors monitor fault conditions at various locations within the correction circuitry, and a protection control unit receives fault signals from the fault detectors and modifies operation of the controller in response to the fault signals.

Abstract: Systems and methods for minimizing delay in a feedback path. In one embodiment, an analog-to-digital feedback path includes an analog-to-digital converter (ADC) configured to receive and digitize an analog signal such as an amplifier output to produce a serial digital output. A serial interface receives and parallelizes the serial digital output to produce a parallel data words that are provided to a processing unit such as a decimator. The processing unit processes the data words to produce a digital feedback signal which can then be used to modify an input signal, such as a digital audio input to the amplifier. A delay minimization subsystem is implemented in the feedback path to monitor a delay between generation of parallel data words by the serial interface and consumption of the parallel data words by the first processing unit. The delay minimization mechanism may be implemented in multiple channels of the feedback path.

Abstract: Systems and methods for pulse width modulating waveforms to represent asymmetric signal levels using pulses that are symmetric within their respective switching periods. One embodiment comprises a pulse width modulation system including an asymmetric correction unit and a pair of modulators. The asymmetric correction unit receives samples of an input signal and produces two separate output signals for corresponding modulators. For each sample, the asymmetric correction unit determines whether the signal level of the sample is symmetric or asymmetric. If the signal level of the sample is symmetric, the sample is forwarded to each of the modulators. If the signal level is asymmetric, the asymmetric correction unit increases one modified sample to the next higher symmetric signal level and decreases another modified sample to the next lower symmetric signal level and forwards the modified samples to the modulators.

Abstract: Systems and methods for performance improvements in digital switching amplifiers using simulation-based feedback. In one embodiment, a digital pulse width modulation (PWM) amplifier includes a signal processing plant configured to receive and process an input audio signal. The amplifier also includes a simulator configured to model processing of audio signals by the plant. The outputs of the plant and the simulator are provided to a subtractor, the output of which is then added to the input audio signal as feedback. The plant may consist of a modulator and power switch, a noise shaper, or any other type of plant. An analog-to-digital converter (ADC) may be provided to convert the output audio signal to a digital signal for input to the subtractor. Filtering may be implemented before or after the ADC, and a decimator may be placed after the ADC if it is an oversampling ADC.

Abstract: Systems and methods for automatically adjusting the alignment of high-side and low-side pulse width modulated signals to improve dead time and shoot-through conditions. In one embodiment, a system includes a digital amplifier controller, an amplifier output stage coupled to the controller and configured to receive audio signals from the controller, and one or more sensors coupled to the output stage. The sensors are configured to detect and/or measure various parameters, such as shoot-through current and distortion, which are associated with the operation of the output stage. The sensors provide feedback to an internal processor or modulator of the controller, which then adjusts the timing of the high-side and low-side signals to improve the operating conditions of the output stage by minimizing shoot-through current and/or distortion.

Abstract: Systems and methods for providing protection from failure events in a digital audio amplification system. One embodiment of the invention comprises a system having a digital amplifier controller, an amplifier output stage coupled to the controller and configured to receive audio signals from the controller, one or more sensors coupled to the output stage and one or more low-pass filters coupled to receive sensor signals from the one or more sensors. The low-pass filter is configured to filter the sensor signals and to provide the filtered sensor signals to the controller, which provides a programmable response to the filtered sensor signals. The response may range from not taking any action, to limiting the amplification of audio signals, to shutting down the system.

Abstract: Systems and methods for transferring data across clock domains in a manner that avoids metastability of the data and is very tolerant of variations in the clock signals of the different clock domains. One embodiment of the invention comprises a mechanism for passing data from a first clock to a second clock domain in a digital pulse width modulated (PWM) amplification system. In this embodiment, parallel data is generated in the process of converting PCM data to PWM data. The parallel data is processed in a clock domain having a first clock rate and is passed to a second clock domain having a clock rate that is twice the rate of the first clock domain. The parallel data is then serialized at the higher clock rate of the second clock domain.