Patents by Inventor Michael Kozuch
Michael Kozuch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8806018Abstract: A dynamic capacity management policy for multi-paralleled computing resources (e.g., application servers, virtual application servers, etc.) that includes one or more of a state-change component, a load-balancing component, and a robustness-control component. The state-change component delays the release (e.g., powering down of a physical server, removal from a virtual-server lease, etc.) of each computing resource for a set amount of time. The load-balancing component can work in conjunction with the state-change component to reduce the number of idle computing resources by distributing incoming requests in a manner that keeps the already-processing computing resources as full of requests as possible. The robustness-control component scales capacity as a function of the current number of requests within the system of computing resources to account for variations other than request rate, such as request size, reduced processor frequency, network slowdowns, etc., that affect processing capacity.Type: GrantFiled: March 30, 2012Date of Patent: August 12, 2014Assignees: Carnegie Mellon University, Intel CorporationInventors: Mor Harchol-Balter, Anshul Gandhi, Varun Gupta, Michael Kozuch
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Patent number: 8732704Abstract: A method and system for supporting personal computing in a public computing infrastructure. The system includes a plurality of computers to be used by patrons of the public computing infrastructure. The system includes a server coupled to the plurality of computers via a network connection. Each of the plurality of computers includes a virtual machine monitor, which includes a plurality of base virtual machine images. Each of the base virtual machine images is customized for a particular hardware and software configuration representing a specific computing environment. The virtual machine monitor launches one of the plurality of base virtual machine images, arbitrates access to system resources via the launched virtual machine image, stores the changes in the state of the virtual machine image when a user terminates a session, and returns a computer to an appropriate state to enable the user to resume the terminated session in subsequent sessions.Type: GrantFiled: July 16, 2012Date of Patent: May 20, 2014Assignee: Intel CorporationInventors: Fernando C. M. Martins, Michael Kozuch
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Publication number: 20120284716Abstract: A method and system for supporting personal computing in a public computing infrastructure. The system includes a plurality of computers to be used by patrons of the public computing infrastructure. The system includes a server coupled to the plurality of computers via a network connection. Each of the plurality of computers includes a virtual machine monitor, which includes a plurality of base virtual machine images. Each of the base virtual machine images is customized for a particular hardware and software configuration representing a specific computing environment. The virtual machine monitor launches one of the plurality of base virtual machine images, arbitrates access to system resources via the launched virtual machine image, stores the changes in the state of the virtual machine image when a user terminates a session, and returns a computer to an appropriate state to enable the user to resume the terminated session in subsequent sessions.Type: ApplicationFiled: July 16, 2012Publication date: November 8, 2012Inventors: Fernando C.M. Martins, Michael Kozuch
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Publication number: 20120254444Abstract: A dynamic capacity management policy for multi-paralleled computing resources (e.g., application servers, virtual application servers, etc.) that includes one or more of a state-change component, a load-balancing component, and a robustness-control component. The state-change component delays the release (e.g., powering down of a physical server, removal from a virtual-server lease, etc.) of each computing resource for a set amount of time. The load-balancing component can work in conjunction with the state-change component to reduce the number of idle computing resources by distributing incoming requests in a manner that keeps the already-processing computing resources as full of requests as possible. The robustness-control component scales capacity as a function of the current number of requests within the system of computing resources to account for variations other than request rate, such as request size, reduced processor frequency, network slowdowns, etc., that affect processing capacity.Type: ApplicationFiled: March 30, 2012Publication date: October 4, 2012Applicant: CARNEGIE MELLON UNIVERSITYInventors: Mor Harchol-Balter, Anshul Gandhi, Varun Gupta, Michael Kozuch
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Patent number: 8225314Abstract: A method and system for support of personal computing in a public computing infrastructure. The system including a plurality of computers to be used by patrons of a public computing infrastructure. The system also includes one or more servers coupled to the plurality of computers via a network connection. Each of the plurality of computers includes a virtual machine monitor. The virtual machine monitor has a plurality of base virtual machine images, each of the base virtual machine images is customized for a particular hardware and software configuration representing a specific computing environment. The virtual machine monitor launches one of the plurality of base virtual machine images, arbitrates access to system resources via the launched virtual machine image, stores the changes in the state of the virtual machine image when a user terminates a session, and returns a computer to an appropriate state to enable the user to resume the terminated session in subsequent sessions.Type: GrantFiled: March 31, 2006Date of Patent: July 17, 2012Assignee: Intel CorporationInventors: Fernando C. M. Martins, Michael Kozuch
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Patent number: 7840962Abstract: In one embodiment, a method includes transitioning control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a VMM timer indicator is set to an enabling value, and identifying a VMM timer value configured by the VMM. The method further includes periodically comparing a current value of a timing source with the VMM timer value, generating an internal event if the current value of the timing source has reached the VMM timer value, and transitioning control to the VMM in response to the internal event without incurring an event handling procedure in any one of the VMM and the VM.Type: GrantFiled: September 30, 2004Date of Patent: November 23, 2010Assignee: Intel CorporationInventors: Gilbert Neiger, Steven M. Bennett, Erik Cota-Robles, Sebastian Schoenberg, Clifford D. Hall, Dion Rodgers, Lawrence O. Smith, Andrew V. Anderson, Richard A. Uhlig, Michael Kozuch, Andy Glew
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Patent number: 7818808Abstract: In one embodiment, a processor mode is provided for guest software. The processor mode enables the guest software to operate at a privilege level intended by the guest software. When the guest software attempts to perform an operation restricted by the processor mode, the processor mode is exited to transfer control over the operation to a virtual-machine monitor, which runs outside this processor mode.Type: GrantFiled: December 27, 2000Date of Patent: October 19, 2010Assignee: Intel CorporationInventors: Gilbert Neiger, Stephen Chou, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Richard Uhlig
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Patent number: 7313669Abstract: In one embodiment, a method for supporting address translation in a virtual-machine environment includes creating a guest translation data structure to be used by a guest operating system for address translation operations, creating an active translation data structure based on the guest translation data structure, and periodically modifying the content of the active translation data structure to conform to the content of the guest translations data structure. The content of the active translation data structure is used by a processor to cache address translations in a translation-lookaside buffer (TLB).Type: GrantFiled: February 28, 2005Date of Patent: December 25, 2007Assignee: Intel CorporationInventors: Gilbert Neiger, Stephen Chou, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Richard Uhlig, Sebastian Schoenberg
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Patent number: 7287197Abstract: In one embodiment, a request to transition control to a virtual machine (VM) is received from a virtual machine monitor (VMM) and a determination is made as to whether the VMM has requested a delivery of a fault to the VM. If the determination is positive, the fault is delivered to the VM when control is transitioned to the VM.Type: GrantFiled: September 15, 2003Date of Patent: October 23, 2007Assignee: Intel CorporationInventors: Steven M. Bennett, Andrew V. Anderson, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger, Richard Uhlig, Michael Kozuch, Lawrence Smith, Scott Rodgers
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Publication number: 20070234356Abstract: A method and system for support of personal computing in a public computing infrastructure. The system including a plurality of computers to be used by patrons of a public computing infrastructure. The system also includes one or more servers coupled to the plurality of computers via a network connection. Each of the plurality of computers includes a virtual machine monitor. The virtual machine monitor has a plurality of base virtual machine images, each of the base virtual machine images is customized for a particular hardware and software configuration representing a specific computing environment. The virtual machine monitor launches one of the plurality of base virtual machine images, arbitrates access to system resources via the launched virtual machine image, stores the changes in the state of the virtual machine image when a user terminates a session, and returns a computer to an appropriate state to enable the user to resume the terminated session in subsequent sessions.Type: ApplicationFiled: March 31, 2006Publication date: October 4, 2007Inventors: Fernando Martins, Michael Kozuch
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Patent number: 7272831Abstract: A method and apparatus for constructing host processor soft devices independent of the host processor operating system are provided. In one embodiment, a driver of a soft device is implemented in a virtual machine monitor (VMM), and the soft device is made available for use by one or more virtual machines coupled to the VMM. In an alternative embodiment, a software component of a soft device is implemented in a first virtual machine that is coupled to a VMM, and the soft device is made available for use by a second virtual machine coupled to the VMM.Type: GrantFiled: March 30, 2001Date of Patent: September 18, 2007Assignee: Intel CorporationInventors: Erik Cota-Robles, Stephen Chou, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Gilbert Neiger, Richard Uhlig
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Publication number: 20070192577Abstract: An apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment are described. The method includes disregarding a received load secure region instruction when a currently active load secure region operation is detected. Otherwise, a memory protection element is directed, in response to the received load secure region instruction, to form a secure memory environment. Once directed, unauthorized read/write access to one or more protected memory regions are prohibited. Finally, a cryptographic hash value of the one or more protected memory regions is stored within a digest information repository as a secure software identification value. Once stored, outside agents may request access to a digitally signed software identification value to establish security verification of secure software within the secure memory environment.Type: ApplicationFiled: January 24, 2006Publication date: August 16, 2007Inventors: Michael Kozuch, James Sutton, David Grawrock, Gilbert Neiger, Richard Uhlig, Bradley Burgess, David Poisner, Clifford Hall, Andy Glew, Lawrence Smith, Robert George
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Patent number: 7225441Abstract: In one embodiment, a method for providing power management via virtualization includes monitoring the utilization of a host platform device by one or more virtual machines and managing power consumption of the host platform device based on the results of monitoring.Type: GrantFiled: December 27, 2000Date of Patent: May 29, 2007Assignee: Intel CorporationInventors: Michael Kozuch, Stephen Chou, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger, Sebastian Schoenberg, Richard Uhlig
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Patent number: 7191440Abstract: Transitions among schedulable entities executing in a computer system are tracked in computer hardware or in a virtual machine monitor. In one aspect, the schedulable entities are operating system processes and threads, virtual machines, and instruction streams executing on the hardware. In another aspect, the schedulable entities are processes or threads executing within the virtual machines under the control of the virtual machine monitor. The virtual machine monitor derives scheduling information from the transitions to enable a virtual machine system to guarantee adequate scheduling quality of service to real-time applications executing in virtual machines that contain both real-time and non-real-time applications. In still another aspect, a parent virtual machine monitor in a recursive virtualization system can use the scheduling information to schedule a child virtual machine monitor that controls multiple virtual machines.Type: GrantFiled: August 15, 2001Date of Patent: March 13, 2007Assignee: Intel CorporationInventors: Erik Cota-Robles, Sebastian Schoenberg, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Gilbert Neiger, Richard Uhlig
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Publication number: 20060155967Abstract: A conjugate processor includes an instruction set architecture (ISA) visible portion having a main pipeline, and an h-flow portion having an h-flow pipeline. The binary executed on the conjugate processor includes an essential portion that is executed on the main pipeline and a non-essential portion that is executed on the h-flow pipeline. The non-essential portion includes hint calculus that is used to provide hints to the main pipeline. The conjugate processor also includes a conjugate mapping table that maps triggers to h-flow targets. Triggers can be instruction attributes, data attributes, state attributes or event attributes. When a trigger is satisfied, the h-flow code specified by the target is executed in the h-flow pipeline.Type: ApplicationFiled: January 13, 2006Publication date: July 13, 2006Inventors: Hong Wang, Ralph Kling, Yong-Fong Lee, David Berson, Michael Kozuch, Konrad Lai
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Patent number: 7073042Abstract: In one embodiment, when it is determined that a modification of content of an active address translation data structure is required, an entry in the active address translation data structure is modified to conform to a corresponding entry in a guest address translation data structure. During the modification, a bit field including one or more access control indicators in the entry of the active address translation data structure is not overwritten with corresponding data from the guest address translation data structure.Type: GrantFiled: December 12, 2002Date of Patent: July 4, 2006Assignee: Intel CorporationInventors: Richard Uhlig, Gilbert Neiger, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Steven M Bennett
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Patent number: 7035963Abstract: In one embodiment, a method for resolving address space conflicts includes detecting that a guest operating system attempts to access a region occupied by a first portion of a virtual machine monitor and relocating the first portion of the virtual machine monitor within the first address space to allow the guest operating system to access the region previously occupied by the first portion of the virtual machine monitor.Type: GrantFiled: December 27, 2000Date of Patent: April 25, 2006Assignee: Intel CorporationInventors: Gilbert Neiger, Stephen Chou, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Richard Uhlig, Sebastian Schoenberg
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Publication number: 20060075402Abstract: In one embodiment, a method includes transitioning control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a VMM timer indicator is set to an enabling value, and identifying a VMM timer value configured by the VMM. The method further includes periodically comparing a current value of a timing source with the VMM timer value, generating an internal event if the current value of the timing source has reached the VMM timer value, and transitioning control to the VMM in response to the internal event without incurring an event handling procedure in any one of the VMM and the VM.Type: ApplicationFiled: September 30, 2004Publication date: April 6, 2006Inventors: Gilbert Neiger, Steven Bennett, Erik Cota-Robles, Sebastian Schoenberg, Clifford Hall, Dion Rodgers, Lawrence Smith, Andrew Anderson, Richard Uhlig, Michael Kozuch, Andy Glew
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Patent number: 7020738Abstract: One embodiment of the invention is method for resolving address space conflicts between a virtual machine monitor and a guest operating system. The method includes allocating an address space for the operating system and an address space for the monitor. The method also includes mapping a portion of the monitor into the address space allocated for the operating system and the address space allocated for the monitor, and locating another portion of the monitor in the address space allocated for the monitor. The method also includes detecting that the operating system attempts to access a region occupied by the portion of the monitor within the address space allocated for the operating system, and relocating that portion of the monitor within that address space to allow the operating system to access the region previously occupied by that portion of the monitor.Type: GrantFiled: September 30, 2003Date of Patent: March 28, 2006Assignee: Intel CorporationInventors: Gilbert Neiger, Stephen Chou, Erik Cota-Robles, Stalinselvaraj Jevasingh, Alain Kagi, Michael Kozuch, Richard Uhlig, Sebastian Schoenberg
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Publication number: 20050240751Abstract: In one embodiment, a method for supporting address translation in a virtual-machine environment includes creating a guest translation data structure to be used by a guest operating system for address translation operations, creating an active translation data structure based on the guest translation data structure, and periodically modifying the content of the active translation data structure to conform to the content of the guest translations data structure. The content of the active translation data structure is used by a processor to cache address translations in a translation-lookaside buffer (TLB).Type: ApplicationFiled: February 28, 2005Publication date: October 27, 2005Inventors: Gilbert Neiger, Stephen Chou, Erik Cota-Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Richard Uhlig, Sebastian Schoenberg