Abstract: A circuit board chassis and a method for assembling a backplane and a circuit board into the circuit board chassis include an aperture within at least one sidewall of the circuit board chassis. The backplane is inserted and assembled into the circuit board chassis through the aperture (that may include a counter-opposed pair of backplane insertion and assembly slots) in a first direction, and a circuit board is inserted and assembled into the circuit board chassis and the backplane in a second direction perpendicular to the first direction. By inserting and assembling the backplane into the aperture and slots, rather than assembling the backplane as an external surface component of the circuit board chassis, the embodiments provide for ease of replacement of the backplane and circuit board under space constrained limitations. The resulting embodiments also provide enhanced rigidity and enhanced thermal dissipation within the circuit board chassis.

Abstract: A circuit board chassis and a method for assembling a backplane and a circuit board into the circuit board chassis include an aperture within at least one sidewall of the circuit board chassis. The backplane is inserted and assembled into the circuit board chassis through the aperture (that may include a counter-opposed pair of backplane insertion and assembly slots) in a first direction, and a circuit board is inserted and assembled into the circuit board chassis and the backplane in a second direction perpendicular to the first direction. By inserting and assembling the backplane into the aperture and slots, rather than assembling the backplane as an external surface component of the circuit board chassis, the embodiments provide for ease of replacement of the backplane and circuit board under space constrained limitations. The resulting embodiments also provide enhanced rigidity and enhanced thermal dissipation within the circuit board chassis.

Abstract: A WDM system is used to transfer bytes of data between keyboard, display and camera portions of a hand held device. The data signals are converted into light wavelengths via lasers or LEDs of differing wavelengths and transported over an optical fiber cable. Mems devices help direct the wavelengths to the optical cable and mems devices may be used at the receiving end. The receiver illustratively has a photodiode array to receive the different wavelengths and produce electronic signals. Optical filters and micro-ring resonators may be employed.

Abstract: A serializer/deserializer is disclosed with a flexible design that allows for sending data streams between computer systems where the power dissipation is markedly reduced by placing the serializer/deserializer in a standby, low power mode between the sending of data. Word data bits are framed and sent along with clock pulses that define when the bits may be reliably received. High speed, typically, CML logic is used for the transmission line drivers and together with the clock pulse, a data word is sent faster than the computer system can send the next word to the serializer/deserializer. The disclosure frames the word and detects the word end, whereupon the system is placed into the standby mode. In addition the serializer/deserializers may be placed in a master/slave arrangement where the slave can be arranged to use the master's clock to send word data bits back to the master.

Abstract: A WDM system is used to transfer bytes of data between keyboard, display and camera portions of a hand held device. The data signals are converted into light wavelengths via lasers or LEDs of differing wavelengths and transported over an optical fiber cable. Mems devices help direct the wavelengths to the optical cable and mems devices may be used at the receiving end. The receiver illustratively has a photodiode array to receive the different wavelengths and produce electronic signals. Optical filters and micro-ring resonators may be employed.

Abstract: A serializer/deserializer is disclosed with a flexible design that allows for sending data streams between computer systems where the power dissipation is markedly reduced by placing the serializer/deserializer in a standby, low power mode between the sending of data. Word data bits are framed and sent along with clock pulses that define when the bits may be reliably received. High speed, typically, CTL logic is used for the transmission line drivers and together with the clock pulse, a data word is sent faster than the computer system can send the next word to the serializer/deserializer. The disclosure frames the word and detects the word end, whereupon the system is placed into the standby mode. In addition the serializer/deserializers may be placed in a master/slave arrangement where the slave can be arranged to use the master's clock to send word data bits back to the master.

Abstract: A serializer and a deserializer are disclosed and shown operating singly or as a pair. The invention operates independently from any outside system reference clock. The inventive system provides an internal bit clock that serializes the data when sending and de-serializes the data when receiving. A bit clock or pulse travels with the data word bits to define when a bit is stable. The system uses word boundary bits operating with a bit clock to distinguish different data words, as described in the parent application. The system operates either synchronously or asynchronously with the base computer or other such digital system, including I/O devices. The invention finds use where new data to be sent is strobed into the serializer, but also where a change in the data bit content itself will cause the changed data to be loaded into the serializer and sent bit by bit. The system operates where new data is strobed or loaded by the serializer (not the base computer system) when the last data word has been sent.

Abstract: A programmable switch of three or more ports, each port having data lines separate from lines sharing control and addressing. The programmable switch includes internal logic control and electronic modules that accept and deserialize the control and address signals. The logic control directs the data in signals to one or more of the output data lines. Since the data and control and addressing lines are separate, the control may act concurrently with the data to direct the data properly. The sending unit must synchronize such operations to ensure data coherency and proper timing. The data signal path from any input to any or all outputs is designed to have, typically, only a single logic gate or on transistor switch delay.

Abstract: A programmable switch of three or more ports, each port having data lines separate from lines sharing control and addressing. The programmable switch includes internal logic control and electronic modules that accept and deserialize the control and address signals. The logic control directs the data in signals to one or more of the output data lines. Since the data and control and addressing lines are separate, the control may act concurrently with the data to direct the data properly. The sending unit must synchronize such operations to ensure data coherency and proper timing. The data signal path from any input to any or all outputs is designed to have, typically, only a single logic gate or on transistor switch delay.

Abstract: Interconnected systems of function cards are presented. An interconnected system may include function cards with substantially identical sets of connectors. The interconnected system includes two groups of function cards, where the function cards within a group are parallel to each other but are perpendicular to the function cards of the other group. The function cards have sets of connectors, which form connector arrays. The connector array of one group of the function cards is reciprocal to the connector array of the other group of function cards. This reciprocity makes it possible to couple the two groups of function cards without a printed circuit board or back plane. The connectors can be male or female, and the male and female connectors of a function card can be arranged in various connector groups. The connectors can form checkerboard and other alternated and interchanged arrays.

Abstract: A programmable switch of three or more ports, each port having data lines separate from lines sharing control and addressing. The programmable switch includes internal logic control and electronic modules that accept and deserialize the control and address signals. The logic control directs the data in signals to one or more of the output data lines. Since the data and control and addressing lines are separate, the control may act concurrently with the data to direct the data properly. The sending unit must synchronize such operations to ensure data coherency and proper timing. The data signal path from any input to any or all outputs is designed to have, typically, only a single logic gate or on transistor switch delay.

Abstract: A mid-connect structure having on one side a first set of function cards in parallel with one another and having a plurality of mid-connect elements applied thereto, and having on the other side a second set of function cards in parallel with one another and having a plurality of mid-connect elements applied thereto. The first set of function cards are electrically coupled to the second set of function cards by connecting the mid-connect elements of the first set to corresponding mid-connect elements of the second set. The first set of function cards are oriented at an angle other than parallel relative to the second set of function cards, thereby allowing one or more function cards on one side to be electrically coupled to one or more function cards on the other side. Typically, this would be a perpendicular arrangement of the first set relative to the second set.

Abstract: A mid-connect interconnection system for coupling a plurality of function cards to one another via a plurality of switch cards. The connection may be established using direct connectors of very short length to provide high-speed transmission with little to no reflection concerns. The connectors are arranged such that the function cards are not connected in parallel with the switch cards. The mid-connect arrangement provides connector access points or locations corresponding in number to the number of switch cards multiplied by the number of line cards. The connectors are formed as one or more pairs of connectors, attached to the switch and function cards, to enable multi-channel point-to-point connections for full input and output among function cards. Each of the switch cards and each of the function cards includes a transceiver driver to enable high speed switching. The arrangement of cards provides broadband throughput on the order of Terabits per second.

Abstract: An adjusting device for a vehicle seat belt assembly will adjust the inclination of the shoulder portion of the belt to accommodate children. The adjusting device is a plate which has an inboard slot, an outboard slot, and an upper slot. The shoulder and lap portions of the web overlie one another and pass through the inboard slot, across one of the sides of the plate, and through the outboard slot. The shoulder portion outboard of the plate passes upward past the other side of the plate and through the upper slot. The plate can manually slide to various positions prior to inserting the shoulder portion through the upper slot.