Patents by Inventor Michael Lamson

Michael Lamson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060244154
    Abstract: A semiconductor device has a semiconductor chip with a periphery and an IC organized in a core portion and a peripheral portion. The IC has a top level of interconnecting metal traces (510) from the peripheral portion to the core portion; the traces are covered by an insulating overcoat (520) which has peripheral windows to expose bond pads. The circuit further has at least one level of metal lines (511) on top of the insulating overcoat; the lines lead from the chip periphery towards the chip core, wherein each line (511) is substantially parallel to one of the traces (510) underneath the insulating overcoat and vertically aligned therewith. After assembling the chip onto a leadframe with segments (504), bonding wires (502) connect the bond pads (510a) and the metal lines (511a) with the segments.
    Type: Application
    Filed: April 29, 2005
    Publication date: November 2, 2006
    Inventors: Howard Test, Michael Lamson
  • Publication number: 20060063304
    Abstract: A high-performance, high I/O ball grid array substrate, designed for integrated circuit flip-chip assembly and having two patterned metal layers, comprising: an insulating layer having a first surface, a second surface and a plurality of vias filled with metal. Said first surface having one of said metal layers attached to provide electrical ground potential, and having a plurality of electrically insulated openings for outside electrical contacts. An outermost insulating film protecting the exposed surface of said ground layer, said film having a plurality of openings filled with metal suitable for solder ball attachment. Said second surface having the other of said metal layers attached, portions thereof being configured as a plurality of electrical signal lines, further portions as a plurality of first electrical power lines, and further portions as a plurality of second electrical power lines, selected signal and power lines being in contact with said vias.
    Type: Application
    Filed: November 7, 2005
    Publication date: March 23, 2006
    Inventors: Michael Lamson, Navinchandra Kalidas
  • Publication number: 20050133901
    Abstract: A system for delivering power to a semiconductor device includes a package substrate comprising a substrate top surface and a substrate bottom surface. The system includes a connector formed on the substrate top surface and a cable coupled to the connector. The cable is operable to deliver power and ground to a top of the package substrate.
    Type: Application
    Filed: December 17, 2003
    Publication date: June 23, 2005
    Inventors: Darvin Edwards, Michael Lamson, Gregory Howard