Patents by Inventor Michael Lawrence Miller

Michael Lawrence Miller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210352798
    Abstract: Provided are interconnect circuits and methods of forming thereof. A method may involve laminating a substrate to a conductive layer followed by patterning the conductive layer. This patterning operation forms individual conductive portions, which may be also referred to as traces or conductive islands. The substrate supports these portions relative to each other during and after patterning. After patterning, an insulator may be laminated to the exposed surface of the patterned conductive layer. At this point, the conductive layer portions are also supported by the insulator, and the substrate may optionally be removed, e.g., together with undesirable portions of the conductive layer. Alternatively, the substrate may be retained as a component of the circuit and the undesirable portions of the patterned conductive layer may be removed separately. These approaches allow using new patterning techniques as well as new materials for substrates and/or insulators.
    Type: Application
    Filed: July 22, 2021
    Publication date: November 11, 2021
    Applicant: CelLink Corporation
    Inventors: Kevin Michael Coakley, Malcolm Parker Brown, Dongao Yang, Michael Lawrence Miller, Paul Henry Lego
  • Patent number: 11116070
    Abstract: Provided are interconnect circuits and methods of forming thereof. A method may involve laminating a substrate to a conductive layer followed by patterning the conductive layer. This patterning operation forms individual conductive portions, which may be also referred to as traces or conductive islands. The substrate supports these portions relative to each other during and after patterning. After patterning, an insulator may be laminated to the exposed surface of the patterned conductive layer. At this point, the conductive layer portions are also supported by the insulator, and the substrate may optionally be removed, e.g., together with undesirable portions of the conductive layer. Alternatively, the substrate may be retained as a component of the circuit and the undesirable portions of the patterned conductive layer may be removed separately. These approaches allow using new patterning techniques as well as new materials for substrates and/or insulators.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: September 7, 2021
    Assignee: CELLINK CORPORATION
    Inventors: Kevin Michael Coakley, Malcolm Parker Brown, Dongao Yang, Michael Lawrence Miller, Paul Henry Lego
  • Publication number: 20190021161
    Abstract: Provided are interconnect circuits and methods of forming thereof. A method may involve laminating a substrate to a conductive layer followed by patterning the conductive layer. This patterning operation forms individual conductive portions, which may be also referred to as traces or conductive islands. The substrate supports these portions relative to each other during and after patterning. After patterning, an insulator may be laminated to the exposed surface of the patterned conductive layer. At this point, the conductive layer portions are also supported by the insulator, and the substrate may optionally be removed, e.g., together with undesirable portions of the conductive layer. Alternatively, the substrate may be retained as a component of the circuit and the undesirable portions of the patterned conductive layer may be removed separately. These approaches allow using new patterning techniques as well as new materials for substrates and/or insulators.
    Type: Application
    Filed: July 13, 2018
    Publication date: January 17, 2019
    Applicant: CelLink Corporation
    Inventors: Kevin Michael Coakley, Malcolm Parker Brown, Dongao Yang, Michael Lawrence Miller, Paul Henry Lego