Abstract: The subject technology is directed to systems and methods for integrating inductors within printed circuit boards. In an embodiment, the subject technology provides an apparatus that includes a substrate comprising a first layer and a first inductor coupled to the first layer. The first inductor includes a second layer comprising a first metal material and a third layer comprising a second metal material. The third layer is coupled to the second layer through a first interconnect. The first inductor may be embedded within the substrate to enable efficient space utilization, leading to overall miniaturization and improved performance due to shorter signal paths and reduced parasitic effects. There are other embodiments as well.

Abstract: In some aspects, the disclosure is directed a module for improving mechanical, electrical, or thermal performance. In some embodiments, the module includes a bottom surface, a side surface, a first solder bump disposed on the bottom surface, and a second solder bump disposed on the bottom surface. In some embodiments, the bottom surface extends in a first lateral direction and a second lateral direction perpendicular to the first lateral direction. In some embodiments, the side surface extends in a vertical direction perpendicular to the first lateral direction and the second lateral direction. In some embodiments, the second solder bump is adjacent to the side surface. In some embodiments, the first solder bump has a first length in the first lateral direction. In some embodiments, the second solder bump has a second length in the first lateral direction. In some embodiments, the first length is greater than the second length.

Abstract: Novel tools and techniques are provided for implementing a semiconductor package or a chip package, and more particularly methods, systems, and apparatuses are provided for implementing a semiconductor package or a chip package including at least two posts having different widths. In an embodiment, a system can include a first substrate having a first layer comprising a first post having a first width and a second layer coupled to the first layer and comprising an external surface of the first substrate and a second post having a second width connected to the first post. The first width can be less than the second width. The system can further include a solder connected to the second post and configured to connect the second post to a first connector on a second substrate.

Abstract: The subject technology is directed to systems and methods for integrating inductors within printed circuit boards. In an embodiment, the subject technology provides an apparatus that includes a substrate comprising a first layer and a first inductor coupled to the first layer. The first inductor includes a second layer comprising a first metal material and a third layer comprising a second metal material. The third layer is coupled to the second layer through a first interconnect. The first inductor may be embedded within the substrate to enable efficient space utilization, leading to overall miniaturization and improved performance due to shorter signal paths and reduced parasitic effects. There are other embodiments as well.

Abstract: A device and substrate are disclosed. An illustrative device includes a substrate having a first surface and an opposing second surface, a solder material receiving curved surface exposed at the second surface of the substrate, a solder resist material that at least partially covers the solder material receiving curved surface such that a middle portion of the solder receiving curved surface is exposed and such that an edge portion of the solder material receiving curved surface is covered by the solder resist material and forms an undercut, and a solder material disposed within the solder material receiving curved surface and within the undercut.

Abstract: In some aspects, the disclosure is directed a module for improving mechanical, electrical, or thermal performance. In some embodiments, the module includes a bottom surface, a side surface, a first solder bump disposed on the bottom surface, and a second solder bump disposed on the bottom surface. In some embodiments, the bottom surface extends in a first lateral direction and a second lateral direction perpendicular to the first lateral direction. In some embodiments, the side surface extends in a vertical direction perpendicular to the first lateral direction and the second lateral direction. In some embodiments, the second solder bump is adjacent to the side surface. In some embodiments, the first solder bump has a first length in the first lateral direction. In some embodiments, the second solder bump has a second length in the first lateral direction. In some embodiments, the first length is greater than the second length.

Abstract: In some aspects, the disclosure is directed a module for improving mechanical, electrical, or thermal performance. In some embodiments, the module includes a bottom surface, a side surface, a first solder bump disposed on the bottom surface, and a second solder bump disposed on the bottom surface. In some embodiments, the bottom surface extends in a first lateral direction and a second lateral direction perpendicular to the first lateral direction. In some embodiments, the side surface extends in a vertical direction perpendicular to the first lateral direction and the second lateral direction. In some embodiments, the second solder bump is adjacent to the side surface. In some embodiments, the first solder bump has a first length in the first lateral direction. In some embodiments, the second solder bump has a second length in the first lateral direction. In some embodiments, the first length is greater than the second length.

Abstract: In some aspects, the disclosure is directed a module for improving mechanical, electrical, or thermal performance. In some embodiments, the module includes a bottom surface, a side surface, a first solder bump disposed on the bottom surface, and a second solder bump disposed on the bottom surface. In some embodiments, the bottom surface extends in a first lateral direction and a second lateral direction perpendicular to the first lateral direction. In some embodiments, the side surface extends in a vertical direction perpendicular to the first lateral direction and the second lateral direction. In some embodiments, the second solder bump is adjacent to the side surface. In some embodiments, the first solder bump has a first length in the first lateral direction. In some embodiments, the second solder bump has a second length in the first lateral direction. In some embodiments, the first length is greater than the second length.

Abstract: A device and substrate are disclosed. An illustrative device includes a substrate having a first surface and an opposing second surface, a solder material receiving curved surface exposed at the second surface of the substrate, a solder resist material that at least partially covers the solder material receiving curved surface such that a middle portion of the solder receiving curved surface is exposed and such that an edge portion of the solder material receiving curved surface is covered by the solder resist material and forms an undercut, and a solder material disposed within the solder material receiving curved surface and within the undercut.

Abstract: A device and substrate are disclosed. An illustrative device includes a substrate having a first surface and an opposing second surface, a solder material receiving curved surface exposed at the second surface of the substrate, a solder resist material that at least partially covers the solder material receiving curved surface such that a middle portion of the solder receiving curved surface is exposed and such that an edge portion of the solder material receiving curved surface is covered by the solder resist material and forms an undercut, and a solder material disposed within the solder material receiving curved surface and within the undercut.

Abstract: A device and substrate are disclosed. An illustrative device includes a substrate having a first surface and an opposing second surface, a solder material receiving curved surface exposed at the second surface of the substrate, a solder resist material that at least partially covers the solder material receiving curved surface such that a middle portion of the solder receiving curved surface is exposed and such that an edge portion of the solder material receiving curved surface is covered by the solder resist material and forms an undercut, and a solder material disposed within the solder material receiving curved surface and within the undercut.

Abstract: An acquisition, pointing, and tracking (ATP) apparatus for free space optical (FSO) communications systems incorporates a multi-element detector array positioned at a focal plane of an optical telescope. An optical communications element lies at the center of the detector array. In lieu of traditional beam steering, the apparatus performs pointing and tracking functions internally by first calculating a position of an optical maximum on the detector array, and then translating the detector array within the focal plane of the telescope such that the optical communications element lies at the optical maximum for transmitting and/or receiving optical communications signals.

Abstract: An acquisition, pointing, and tracking (ATP) apparatus for free space optical (FSO) communications systems incorporates a multi-element detector array positioned at a focal plane of an optical telescope. An optical communications element lies at the center of the detector array. In lieu of traditional beam steering, the apparatus performs pointing and tracking functions internally by first calculating a position of an optical maximum on the detector array, and then translating the detector array within the focal plane of the telescope such that the optical communications element lies at the optical maximum for transmitting and/or receiving optical communications signals.

Abstract: A system and method in the field of free space optical communications (FSOC) for overcoming atmospheric-induced spatial optical signal variations operates within each of two FSOC terminals that make up a bi-directional FSOC link, with each terminal providing the rapid adaptive beam path method over a much wider field of view than typically used for adaptive optical techniques. Each terminal uses a real-time adaptive beam-steering technique that continuously measures optical power and optical power gradients by the receiver optical detectors; this data is sent to a control system that automatically responds by re-aligning the optical system accordingly by maximizing the optical signal power measured by the optical power receiving detector.

Abstract: A distributed Bragg reflector and a method of fabricating the same incorporates a support for supporting the gaps against collapse. The method includes forming a plurality of alternating structure and sacrificial layers on a substrate. The structure and sacrificial layers are etched into at least one mesa protruding from the substrate. A support layer is formed on the at least one mesa leaving a portion of the structure and sacrificial layers exposed. At least a portion of at least one of the exposed sacrificial layers are etched from between the structure layers to form gaps between the structure layers.

Abstract: A light generating device such as a VCSEL includes a light generation layer, a top reflector, a bottom reflector, and a high thermal conductivity (HTC) layer between the light generation layer and the bottom reflector. The light generation layer is adapted to generate light having a first wavelength. Heat produced at the light generation layer is more efficiently dissipated due to the presence of the HTC layer. Alternatively, a light generating device such as a VCSEL includes a light generation layer, a top reflector, and a high thermal conductivity (HTC) bottom reflector. Heat produced at the light generation layer is more efficiently dissipated due to the fact that the bottom reflector is a HTC DBR reflector having lower thermal resistivity than a conventional DBR reflector.

Abstract: A light generating device such as a VCSEL includes a light generation layer, a top reflector, a bottom reflector, and a high thermal conductivity (HTC) layer between the light generation layer and the bottom reflector. The light generation layer is adapted to generate light having a first wavelength. Heat produced at the light generation layer is more efficiently dissipated due to the presence of the HTC layer. Alternatively, a light generating device such as a VCSEL includes a light generation layer, a top reflector, and a high thermal conductivity (HTC) bottom reflector. Heat produced at the light generation layer is more efficiently dissipated due to the fact that the bottom reflector is a HTC DBR reflector having lower thermal resistivity than a conventional DBR reflector.

Abstract: A distributed Bragg reflector and a method of fabricating the same incorporates a support for supporting the gaps against collapse. The method includes forming a plurality of alternating structure and sacrificial layers on a substrate. The structure and sacrificial layers are etched into at least one mesa protruding from the substrate. A support layer is formed on the at least one mesa leaving a portion of the structure and sacrificial layers exposed. At least a portion of at least one of the exposed sacrificial layers are etched from between the structure layers to form gaps between the structure layers.

Abstract: A strain compensating structure comprises a strain compensating layer adjacent an oxide-forming layer. The strain compensating layer compensates for the change in the lattice parameter due to oxidation of at least part of the oxide-forming layer.

Abstract: An optical isolator for coupling light from a first waveguide to a second waveguide is disclosed. The optical isolator utilizes a resonator coupled to the first and second optical waveguides. The resonator has a resonance at ? for light traveling from the first optical waveguide to the second optical waveguide; however, the resonator does not have a resonance at ? for light traveling from the second waveguide to the first waveguide. The resonator can use a layer of ferromagnetic material in an applied magnetic field. The magnetic field within the ferromagnetic material varies in strength and/or direction over the layer of ferromagnetic material. The magnetic field can be generated by an external magnetic field that varies over the layer of ferromagnetic material. Alternatively, the resonator can include a layer of ferromagnetic metal that overlies a portion of the layer of ferromagnetic material and a constant external magnetic field.