Abstract: Techniques for the testing of devices are disclosed. A testing environment is accessed. The testing environment includes an instruction RAM, an instruction fetch and decode unit (FAD), a code exerciser, a command interface, and a trace RAM. A device under test (DUT) is accessible by the command interface. The testing environment includes a test instruction set architecture (TISA). A test sequence is programmed by a user. The test sequence includes one or more instructions from within the TISA. The test sequence is stored in the instruction RAM. A first instruction is fetched by the FAD. The fetching includes decoding the first instruction. The first instruction is translated by the code exerciser. The translating produces a first packetized communication, which is sent to the DUT. A first packetized response is received by the command interface from the DUT and is reported to the user.

Abstract: Disclosed embodiments provide techniques for a networking with a network-on-chip (NoC) interface with subtopologies. A system-on-chip (SoC) is accessed. The SoC includes a plurality of logic blocks. A NoC topology is created. The NoC topology includes one or more subtopologies. The one or more subtopologies are based on a physical location of the plurality of logic blocks. Each subtopology includes at least one router. A location of the one or more subtopologies is optimized. The one or more subtopologies are coupled based on one or more communications protocols. A protocol running on the plurality of logic blocks is translated to the one or more communications protocols. Data is sent from a sending subtopology within the one or more subtopologies to a receiving subtopology within the one or more subtopologies.

Abstract: A second block to be encoded after a first block, from among a plurality of blocks obtained by recursively dividing an image region in accordance with quadtree spatial splitting, is specified based on a size of the first block. The second block is encoded.

Abstract: The present disclosure provides a processing system for processing a number of cryptocurrencies, the processing system comprising a merchant terminal configured to generate transaction information as a basis for the generation of transactions with one of the cryptocurrencies, and an automatic transaction handling processor configured to process transactions generated based on the transaction information and to automatically split and/or redistribute transferred coins and/or assets based on a predetermined transfer policy. Further, the present disclosure provides a respective method.

Abstract: Encoding information associated with encoding is acquired for each of a plurality of blocks that are obtained by recursively dividing an image region by quadtree spatial splitting. The encoding information of a target block and sub-blocks that belong to the target block if the image region is divided into units of the sub-blocks that are each smaller than the block are stored in a memory in association with each other. Encoding information that is associated with an adjacent sub-block that is adjacent to a first block among the sub-blocks that belong to a second block that is adjacent to the first block in the image region is acquired from the memory. Then, an encoding process is performed using this acquired encoding information and encoding information of the first block.

Abstract: A second block to be encoded after a first block, from among a plurality of blocks obtained by recursively dividing an image region in accordance with quadtree spatial splitting, is specified based on a size of the first block. The second block is encoded.

Abstract: Encoding information associated with encoding is acquired for each of a plurality of blocks that are obtained by recursively dividing an image region by quadtree spatial splitting. The encoding information of a target block and sub-blocks that belong to the target block if the image region is divided into units of the sub-blocks that are each smaller than the block are stored in a memory in association with each other. Encoding information that is associated with an adjacent sub-block that is adjacent to a first block among the sub-blocks that belong to a second block that is adjacent to the first block in the image region is acquired from the memory. Then, an encoding process is performed using this acquired encoding information and encoding information of the first block.