Patents by Inventor Michael Longwell

Michael Longwell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Controlling signal states and leakage current during a sleep mode
    Patent number: 7417481
    Abstract: A circuit includes an input terminal, an output terminal and a latch. The input terminal receives an input signal. The latch is programmable with a value. The latch communicates the input signal to the output terminal in response to the circuit not being in a sleep mode and in response to the circuit being in the sleep mode, furnishes a second signal to the output terminal indicative of the value.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: August 26, 2008
    Assignee: Intel Corporation
    Inventors: Zahid Ahsanullah, Michael Longwell, James R. Feddeler
  • Method and apparatus for error detection and correction
    Publication number: 20070214403
    Abstract: A Random Access Error Detection and Correction unit (RAEDAC) that incorporates a bit-wise error detection and correction unit (BEDAC) in a memory system. In one embodiment, a word-wise error detection and correction unit (WEDAC) operates in coordination with a BEDAC that performs a bit-wise parity calculation. In another embodiment, a WEDAC operates in coordination with a full bit-wise BEDAC that calculates bit-wise check bits. The RAEDAC may be applied to create a multi-dimensional EDAC where, for example, the memory is partitioned into a stack of planes, and a stack-wise error detection and correction unit (SEDAC) is implemented.
    Type: Application
    Filed: September 11, 2006
    Publication date: September 13, 2007
    Inventors: Michael Longwell, William Atwell, Jeffrey Myers
  • Controlling signal states and leakage current during a sleep mode
    Publication number: 20050083103
    Abstract: A circuit includes an input terminal, an output terminal and a latch. The input terminal receives an input signal. The latch is programmable with a value. The latch communicates the input signal to the output terminal in response to the circuit not being in a sleep mode and in response to the circuit being in the sleep mode, furnishes a second signal to the output terminal indicative of the value.
    Type: Application
    Filed: October 7, 2004
    Publication date: April 21, 2005
    Inventors: Zahid Ahsanullah, Michael Longwell, James Feddeler
  • Controlling signal states and leakage current during a sleep mode
    Patent number: 6882200
    Abstract: A circuit includes an input terminal, an output terminal and a latch. The input terminal receives an input signal. The latch is programmable with a value. The latch communicates the input signal to the output terminal in response to the circuit not being in a sleep mode and in response to the circuit being in the sleep mode, furnishes a second signal to the output terminal indicative of the value.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: April 19, 2005
    Assignee: Intel Corporation
    Inventors: Zahid Ahsanullah, Michael Longwell, James R. Feddeler
  • Controlling signal states and leakage current during a sleep mode
    Publication number: 20050052206
    Abstract: A circuit includes an input terminal, an output terminal and a latch. The input terminal receives an input signal. The latch is programmable with a value. The latch communicates the input signal to the output terminal in response to the circuit not being in a sleep mode and in response to the circuit being in the sleep mode, furnishes a second signal to the output terminal indicative of the value.
    Type: Application
    Filed: October 21, 2004
    Publication date: March 10, 2005
    Inventors: Zahid Ahsanullah, Michael Longwell, James Feddeler
  • Controlling signal states and leakage current during a sleep mode
    Publication number: 20030016062
    Abstract: A circuit includes an input terminal, an output terminal and a latch. The input terminal receives an input signal. The latch is programmable with a value. The latch communicates the input signal to the output terminal in response to the circuit not being in a sleep mode and in response to the circuit being in the sleep mode, furnishes a second signal to the output terminal indicative of the value.
    Type: Application
    Filed: July 23, 2001
    Publication date: January 23, 2003
    Inventors: Zahid Ahsanullah, Michael Longwell, James R. Feddeler