Abstract: A method for collaboration using digital notes. A facilitator starts a session during a video conferencing with participants and can share a screen with the participants. The screen displays a code, a session ID, and a link. Participants join the session by scanning the code with a camera, entering the session ID, or accessing the link. During the session, the participants can create digital notes or scan physical notes to have them converted to digital notes. The facilitator then receives the digital notes sent from the participants during the session and moves the digital notes to a group on the facilitator's screen. Since the facilitator's screen is shared with the participants, any participant can view the digital notes in the group from all of the participants for collaboration as controlled by the facilitator.

Abstract: Design of ultra broadband transimpedance amplifiers (TIA) for optical fiber communications is disclosed. In one embodiment, a TIA comprises a gm-boosted dual-feedback common-base stage, a level shifter and an RC-degenerated common-emitter stage, and a first emitter-follower stage, wherein the first emitter follower stage is inductively degenerated. An output of the TIA is buffered using a second emitter-follower stage.

Abstract: Design of ultra broadband transimpedance amplifiers (TIA) for optical fiber communications is disclosed. In one embodiment, a TIA comprises a gm-boosted dual-feedback common-base stage, a level shifter and an RC-degenerated common-emitter stage, and a first emitter-follower stage, wherein the first emitter follower stage is inductively degenerated. An output of the TIA is buffered using a second emitter-follower stage.

Abstract: A full-rate referenceless clock-data recovery architecture with neither a frequency detector nor a lock detector that allows both frequency and phase locking in a single loop. According to one embodiment, a referenceless clock data recovery (CDR) circuit, comprises a digital control circuit (DCC), a phase and strobe point detector circuit (PSPD), and an LC voltage control oscillator (LC VCO) electrically coupled to the PSPD and DCC such that a frequency of the LC VCO decreases when a negative strobe point is detected and an initial frequency of the LC VCO is higher than an input data bit rate.

Abstract: High-speed CMOS ring voltage controlled oscillators with low supply sensitivity have been disclosed. According to one embodiment, a CML ring oscillator comprises a CML negative impedance compensation circuit comprising two cross coupled transistors and a resistor connected to the two transistors for resistive biasing and a CML interpolating delay cell connected in parallel with the CML negative impedance compensation. An impedance change of the CML negative impedance compensation due to supply variation counteracts an impedance change of the CML interpolating delay cell.

Abstract: A full-rate referenceless clock-data recovery architecture with neither a frequency detector nor a lock detector that allows both frequency and phase locking in a single loop. According to one embodiment, a referenceless clock data recovery (CDR) circuit, comprises a digital control circuit (DCC), a phase and strobe point detector circuit (PSPD), and an LC voltage control oscillator (LC VCO) electrically coupled to the PSPD and DCC such that a frequency of the LC VCO decreases when a negative strobe point is detected and an initial frequency of the LC VCO is higher than an input data bit rate.

Abstract: A positioning device for providing access to a ventricle of a heart. In one embodiment, the device includes a cup positionable over an apex of the heart and at least a first access valve in the cup for accessing an entry point to the ventricle of the heart.

Abstract: A surgical fastener clip for proximating tissue, the clip providing an undeflected state in which the clip comprises a center portion, a first leg, and a second leg. The center portion has a perimeter defining a circle-like shape. The legs project outwardly relative to the perimeter from a point of departure to a tip. Extension of each of the legs relative to the perimeter defines an identical wind direction that is either clockwise or counterclockwise. The clip optionally includes a linear cross-member extending across the perimeter. The surgical clip can be formed by a wire that is partially wound onto itself in a spiral-like fashion, with the center portion and the legs being co-planar in the undeflected state. During use, the clip is rotated, drawing tissue into the center portion. Systems incorporating the clip are also provided.

Abstract: High-speed CMOS ring voltage controlled oscillators with low supply sensitivity have been disclosed. According to one embodiment, a CML ring oscillator comprises a CML negative impedance compensation circuit comprising two cross coupled transistors and a resistor connected to the two transistors for resistive biasing and a CML interpolating delay cell connected in parallel with the CML negative impedance compensation. An impedance change of the CML negative impedance compensation due to supply variation counteracts an impedance change of the CML interpolating delay cell.

Abstract: An ablation catheter including an inner tube having a length, a distal end and a longitudinal axis, a plurality of needles extending from the distal end of the inner tube and biased away from the longitudinal axis, an outer sheath slideably moveable relative to the inner tube to surround at least a portion of the length of the inner tube and its extending needles, and a radio frequency energy source electrically connected to the plurality of needles.

Abstract: High-speed CMOS ring voltage controlled oscillators with low supply sensitivity have been disclosed. According to one embodiment, a CML ring oscillator comprises a CML negative impedance compensation circuit comprising two cross coupled transistors and a resistor connected to the two transistors for resistive biasing and a CML interpolating delay cell connected in parallel with the CML negative impedance compensation. An impedance change of the CML negative impedance compensation due to supply variation counteracts an impedance change of the CML interpolating delay cell.

Abstract: Improved methods and apparatus that make more accurate and reduces risk of filling reaction chambers of cartridge cells with blood samples to conduct blood coagulation tests of the type employing the plunger technique are disclosed. A cartridge holder is provided that secures a test cartridge in a fixed upright position and deflects the plunger flag of each cartridge cell to enable manual insertion of a blood dispenser deeply into the reaction chamber to fill the reaction chamber and avoid contamination of surfaces of the cartridge outside the reaction chamber. Preferably, the cartridge holder provides illumination of the reaction chamber during filling, so that the user can judge when the reaction chamber is properly filled with blood dispensed from the blood dispenser. The cartridge holder may incorporate image magnification to facilitate viewing of the reaction chamber as it is filled.

Abstract: High-speed CMOS ring voltage controlled oscillators with low supply sensitivity have been disclosed. According to one embodiment, a CML ring oscillator comprises a CML negative impedance compensation circuit comprising two cross coupled transistors and a resistor connected to the two transistors for resistive biasing and a CML interpolating delay cell connected in parallel with the CML negative impedance compensation. An impedance change of the CML negative impedance compensation due to supply variation counteracts an impedance change of the CML interpolating delay cell.

Abstract: Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic with inductive broadbanding fabricated in conventional CMOS process technology. Optimum balance between power consumption and speed for each circuit application is achieved by combining high speed C3MOS logic with inductive broadbanding/C3MOS logic with low power conventional CMOS logic. The combined C3MOS logic with inductive broadbanding/C3MOS/CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems.

Abstract: An ablation catheter including an inner tube having a length, a distal end and a longitudinal axis, a plurality of needles extending from the distal end of the inner tube and biased away from the longitudinal axis, an outer sheath slideably moveable relative to the inner tube to surround at least a portion of the length of the inner tube and its extending needles, and a radio frequency energy source electrically connected to the plurality of needles.

Abstract: A positioning device for providing access to a ventricle of a heart. In one embodiment, the device includes a cup positionable over an apex of the heart and at least a first access valve in the cup for accessing an entry point to the ventricle of the heart.

Abstract: A surgical fastener clip for proximating tissue, the clip providing an undeflected state in which the clip comprises a center portion, a first leg, and a second leg. The center portion has a perimeter defining a circle-like shape. The legs project outwardly relative to the perimeter from a point of departure to a tip. Extension of each of the legs relative to the perimeter defines an identical wind direction that is either clockwise or counterclockwise. The clip optionally includes a linear cross-member extending across the perimeter. The surgical clip can be formed by a wire that is partially wound onto itself in a spiral-like fashion, with the center portion and the legs being co-planar in the undeflected state. During use, the clip is rotated, drawing tissue into the center portion. Systems incorporating the clip are also provided.

Abstract: Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic with inductive broadbanding fabricated in conventional CMOS process technology. Optimum balance between power consumption and speed for each circuit application is achieved by combining high speed C3MOS logic with inductive broadbanding/C3MOS logic with low power conventional CMOS logic. The combined C3MOS logic with inductive broadbanding/C3MOS/CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems.

Abstract: Various circuit techniques for implementing ultra high speed circuits use current-controlled CMOS (C3MOS) logic with inductive broadbanding fabricated in conventional CMOS process technology. Optimum balance between power consumption and speed for each circuit application is achieved by combining high speed C3MOS logic with inductive broadbanding/C3MOS logic with low power conventional CMOS logic. The combined C3MOS logic with inductive broadbanding/C3MOS/CMOS logic allows greater integration of circuits such as high speed transceivers used in fiber optic communication systems.

Abstract: Improved methods and apparatus that make more accurate and reduces risk of filling reaction chambers of cartridge cells with blood samples to conduct blood coagulation tests of the type employing the plunger technique are disclosed. A cartridge holder is provided that secures a test cartridge in a fixed upright position and deflects the plunger flag of each cartridge cell to enable manual insertion of a blood dispenser deeply into the reaction chamber to fill the reaction chamber and avoid contamination of surfaces of the cartridge outside the reaction chamber. Preferably, the cartridge holder provides illumination of the reaction chamber during filling, so that the user can judge when the reaction chamber is properly filled with blood dispensed from the blood dispenser. The cartridge holder may incorporate image magnification to facilitate viewing of the reaction chamber as it is filled.