Patents by Inventor Michael M. Walters

Michael M. Walters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080303584
    Abstract: A charge circuit for providing a gate driver supply voltage for a gate driver of a switching power supply in accordance with an embodiment of the present application includes a first voltage source providing a first voltage and a charge pump circuit connected to the first voltage source and operable to be turned ON and OFF to improve efficiency such that an increased output voltage of the charge circuit is provided when the charge pump circuit is ON, and wherein the output voltage is the gate driver supply voltage.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 11, 2008
    Inventor: Michael M. Walters
  • Patent number: 7132820
    Abstract: A synthetic ripple regulator including a synthetic ripple voltage generator that generates a synthetic ripple voltage indicative of the ripple current through an output inductor. The regulator uses the synthetically generated ripple voltage to control toggling of a hysteretic comparator for developing the pulse width modulation (PWM) signal that controls switching of the regulator. In a non-limiting implementation, a transconductance amplifier monitors the phase node voltage of the inductor and supplies an inductor voltage-representative current to a ripple capacitor, which produces the synthetic ripple voltage. Using the replicated inductor current for ripple regulation results in low output ripple, input voltage feed forward, and simplified compensation.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: November 7, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Michael M. Walters, Vladimir Muratov, Sefan Wlodzimierz Wiktor
  • Patent number: 7019502
    Abstract: A multiphase synthetic ripple voltage generator for a multiphase DC-DC regulator including a master clock circuit that generates a master clock signal, sequence logic and a ripple regulator for each phase. The DC-DC regulator includes multiple switching circuits, each responsive to a corresponding PWM signal to switch input voltages via a phase node through an output inductor to develop an output voltage. The sequence logic sets each PWM signal in sequential order based on the master clock signal. Each ripple generator includes a transconductance amplifier, a ripple capacitor and a comparator. The transconductance amplifier has an input coupled to a corresponding output inductor and an output coupled to a corresponding ripple capacitor. The comparator has a first input coupled to the ripple capacitor, a second input receiving an error voltage, and an output coupled to the sequence logic for resetting a corresponding PWM signal.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: March 28, 2006
    Assignee: Intersil America's Inc.
    Inventors: Michael M. Walters, Xuening Li, Thomas A. Jochum
  • Patent number: 7002325
    Abstract: A clocked cascadable power regulator including synchronization logic and PWM control logic. The synchronization logic receives a clock signal and asserts a digital output signal synchronized with the clock signal in response to assertion of a digital input signal. The PWM control logic controls a PWM cycle in response to the digital input signal and in response to an output control condition. The regulator may be used alone or cascaded with other similar regulators for implementing a multiphase power converter with multiple channels. The clocked cascadable regulator uses digital signals to communicate between channels. Digital signals are not prone to the same kind of signal degradation or noise susceptibility as analog signals. In the cascaded configuration, there is one clock common to all channels which ensures that the phase separation between the channels is symmetrical to within the jitter tolerance of the common clock.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: February 21, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Matthew B. Harris, Michael M. Walters
  • Patent number: 6995549
    Abstract: A voltage regulator exhibits a load line that is piecewise linear. This piecewise linearity variation has a first constant voltage segment VLEAK at which output voltage is regulated for output currents less than or equal to the leakage current IL. The output voltage VLEAK corresponds to the maximum output voltage allowable at the leakage current for a given operational range specification. The piecewise linearity variation further includes a second, linearly decreasing segment that varies from the maximum allowable output voltage VLEAK at the leakage current to a full load voltage VDROOP at full load current IFL. This serves to effectively maximize the available output voltage swing in the presence of a leakage current offset. The piecewise linear load line is adjustable to accommodate changes in leakage current.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: February 7, 2006
    Assignee: Intersil Americas Inc.
    Inventor: Michael M. Walters
  • Patent number: 6995548
    Abstract: A multiphase DC-DC converter architecture, in which respectively different channels have different operational performance parameters. These different parameters are selected so as to enable the converter to achieve an extended range of high efficiency. The converter contains a combination of one or more fast response time-based converter channels, and one or more highly efficient converter channels in respectively different phases thereof and combines the outputs of all the channels. The efficiency of the asymmetric multiphase converter is higher at light loads (up to approximately 12 amps), enabling it to offer longer battery life in applications that spend most of their operating time in the leakage mode, as noted above.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: February 7, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Michael M. Walters, Shea L. Petricek
  • Patent number: 6922044
    Abstract: A multiphase ripple voltage regulator generator employs a hysteretic comparator referenced to upper and lower voltage thresholds. The hysteretic comparator monitors a master ripple voltage waveform developed across a capacitor supplied with a current proportional to the difference between the output voltage and either the input voltage or ground. The output of the hysteretic comparator generates a master clock signal that is sequentially coupled to PWM latches, the states of which define the durations of respective components of the synthesized ripple voltage. A respective PWM latch has a first state initiated by a selected master clock signal and terminated by an associated phase voltage comparator that monitors a respective phase node voltage.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: July 26, 2005
    Assignee: Intersil Americas Inc.
    Inventors: Michael M. Walters, Xuening Li, Thomas A. Jochum
  • Patent number: 6870352
    Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: March 22, 2005
    Assignee: Intersil Americas Inc.
    Inventors: Michael M. Walters, Matthew B. Harris, Bogdan M. Duduman
  • Patent number: 6833690
    Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: December 21, 2004
    Assignee: Intersil Americas Inc.
    Inventors: Michael M. Walters, Matthew B. Harris, Bogdan M. Duduman
  • Publication number: 20040217744
    Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.
    Type: Application
    Filed: June 2, 2004
    Publication date: November 4, 2004
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Michael M. Walters, Matthew B. Harris, Bogdan M. Duduman
  • Patent number: 6812677
    Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: November 2, 2004
    Assignee: Intersil Americas Inc.
    Inventors: Michael M. Walters, Matthew B. Harris, Bogdan M. Duduman
  • Publication number: 20040178779
    Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.
    Type: Application
    Filed: March 23, 2004
    Publication date: September 16, 2004
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Michael M. Walters, Matthew B. Harris, Bogdan M. Duduman
  • Patent number: 6791306
    Abstract: A synthetic ripple regulator for a DC—DC converter generates an auxiliary voltage waveform that effectively replicates the waveform ripple current through an output inductor, and uses the auxiliary voltage waveform to control toggling of a hysteretic comparator. In a non-limiting implementation, a transconductance amplifier monitors the voltage across the inductor, and supplies an inductor voltage-representative current to a ripple waveform capacitor, so as to produce the auxiliary voltage waveform. Using the replicated inductor current for ripple regulation results in low output ripple, input voltage feed forward, and simplified compensation.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: September 14, 2004
    Assignee: Intersil Americas Inc.
    Inventors: Michael M. Walters, Vladimir Muratov, Stefan Wlodzimierz Wiktor
  • Patent number: 6734656
    Abstract: A power switching stage architecture for a buck topology-based, DC—DC converter includes an upper power switching N-channel device FET integrated in the same semiconductor circuit chip with the switching driver, while a lower power switching is also an N-channel FET, but is external to the driver chip. Either of the two power switching FETs may be configured to include a pilot FET cell, to facilitate current sensing for the controller.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: May 11, 2004
    Assignee: Intersil Americas Inc.
    Inventors: Greg J. Miller, Michael M. Walters
  • Publication number: 20040070382
    Abstract: A multiphase ripple voltage regulator generator employs a hysteretic comparator referenced to upper and lower voltage thresholds. The hysteretic comparator monitors a master ripple voltage waveform developed across a capacitor supplied with a current proportional to the difference between the output voltage and either the input voltage or ground. The output of the hysteretic comparator generates a master clock signal that is sequentially coupled to PWM latches, the states of which define the durations of respective components of the synthesized ripple voltage. A respective PWM latch has a first state initiated by a selected master clock signal and terminated by an associated phase voltage comparator that monitors a respective phase node voltage.
    Type: Application
    Filed: September 29, 2003
    Publication date: April 15, 2004
    Applicant: Intersil Americas Inc.
    Inventors: Michael M. Walters, Xuening Li, Thomas A. Jochum
  • Patent number: RE38780
    Abstract: A DC/DC converter has an output voltage and sources an output current to a load. The DC/DC converter includes an error amplifier with a reference input and a summing input. The reference input is electrically connected to a reference voltage. The summing input is electrically connected to the output voltage and the output current. The summing input is configured for adding together the output voltage and the output current. The error amplifier issues an error signal and adjusts the error signal dependent at least in part upon the output voltage and the output current. A comparator receives the error signal. The comparator has a ramp input electrically connected to a voltage ramp signal. The comparator issues an output signal that is based at least in part upon said error input. A power switch has an on condition and an off condition, and supplies dc current to the load when in the on condition. The power switch has a control input electrically connected to the comparator output signal.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: August 23, 2005
    Assignee: Intersil Americas Inc.
    Inventors: Charles E. Hawkes, Michael M. Walters, Robert H. Isham
  • Patent number: RE38846
    Abstract: A multi-phase DC/DC converter having an output voltage and including a plurality of converter channels. Each converter channel includes a converter channel input and a converter channel output. Each converter channel is configured for generating a converter channel current and for adjusting said converter channel current in response to a control signal electrically connected to each converter channel input. A control circuit generates an error signal representative of a comparison of the converter output voltage to a reference voltage. The control circuit includes a plurality of control circuit channels, each of which correspond to a converter channel. Each control circuit channel generates a channel current signal representative of a corresponding converter channel current, and generates a differential channel current signal representative of a comparison of the channel current signal to an average current signal.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: October 25, 2005
    Assignee: Intersil Communications, Inc.
    Inventors: Michael M. Walters, Charles E. Hawkes, Robert H. Isham
  • Patent number: RE38906
    Abstract: A DC/DC converter has an output voltage and sources an output current to a load. The DC/DC converter includes an error amplifier with a reference input and a summing input. The reference input is electrically connected to a reference voltage. The summing input is electrically connected to the output voltage and the output current. The summing input is configured for adding together the output voltage and the output current. The error amplifier issues an error signal and adjusts the error signal dependent at least in part upon the output voltage and the output current. A comparator receives the error signal. The comparator has a ramp input electrically connected to a voltage ramp signal. The comparator issues an output signal that is based at least in part upon said error input. A power switch has an on condition and an off condition, and supplies dc current to the load when in the on condition. The power switch has a control input electrically connected to the comparator output signal.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: December 6, 2005
    Assignee: Intersil Americas, Inc.
    Inventors: Charles E. Hawkes, Michael M. Walters, Robert H. Isham
  • Patent number: RE38940
    Abstract: A DC to DC buck pulse width modulator converter circuit includes an input, a high side output and a low side output. A high side switch is electrically connected between a common output node and a voltage supply, and controls a flow of current therethrough dependent upon the high side output. A low side switch is electrically connected between the common output node and ground, and controls a flow of current therethrough dependent upon the low side output. A virtual ground amplifier includes a second input electrically connected to ground. A current feedback resistor is electrically connected intermediate the common output node and a first input of the virtual ground amplifier. A variable impedance component is electrically connected to an output of the virtual ground amplifier and to the first input of the virtual ground amplifier. The impedance of the variable impedance component is varied dependent upon the output of the virtual ground amplifier.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: January 24, 2006
    Assignee: Intersil Communications, Inc.
    Inventors: Robert H. Isham, Charles E. Hawkes, Michael M. Walters
  • Patent number: RE40593
    Abstract: A multi-phase DC/DC converter having an output voltage and including a plurality of converter channels. Each converter channel includes a converter channel input and a converter channel output. Each converter channel is configured for generating a converter channel current and for adjusting said converter channel current in response to a control signal electrically connected to each converter channel input. A control circuit generates an error signal representative of a comparison of the converter output voltage to a reference voltage. The control circuit includes a plurality of control circuit channels, each of which correspond to a converter channel. Each control circuit channel generates a channel current signal representative of a corresponding converter channel current, and generates a differential channel current signal representative of a comparison of the channel current signal to an average current signal.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: December 2, 2008
    Assignee: Intersil Americas Inc.
    Inventors: Michael M. Walters, Charles E. Hawkes, Robert H. Isham