Abstract: A tri-state driver circuit is provided having a first clock node; and a second clock node, the first and second clock nodes being adapted to receive first and second clock signals from respectively first and second clock signal sources, the first clock signal being periodic and having a first and second logic level, the second clock signal being the complement of the first clock signal. A float node is included and is adapted to receive a complement float signal (F) having a first and second logic level from a float signal source, an array of input nodes are also included, each input node being adapted to receive an input signal having a first and second logic level from a respective input signal source. An array of output nodes are included, each output node corresponding to a respective input node and being coupled to a respective load.

Abstract: A time delay circuit having a voltage reference node adapted to receive a reference voltage from a reference voltage source, the time delay circuit comprising: a resistor, a capacitance means having a first and second node, the first node being connected to a reference potential, such as ground, the resistor being connected between the input signal node and the capacitance means second node, a first field effect transistor having a gate and a conduction channel having a first and second terminal, the first field effect transistor gate being connected to the voltage reference node, the first field effect transistor conduction channel second terminal being connected to the capacitance means second node, the first field effect transistor conduction channel first terminal being connected to the output signal node,a second field effect transistor having a gate and a conduction channel having a first and second terminal, the second field effect transistor device gate being connected to a clock signal node, the seco

Abstract: A high-voltage sensing logic circuit for detecting the occurrence of an input signal level applied to the circuit which exceeds a predetermined threshold voltage level and for providing a unique output signal level in response thereto, the circuit adapted to operate over first and second time intervals from a voltage source providing supply and reference voltage levels wherein first and second chargeable devices with first terminals connected to form a common node are charged to substantially the supply voltage level at the common node during the first time interval. The first chargeable device has a second terminal to which is alternately applied reference and supply voltage levels during the first and second time intervals, respectively. The second chargeable device has a second terminal connected to a second node.