Patents by Inventor Michael Mayerhofer
Michael Mayerhofer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230417950Abstract: A system for determining pressure in a hydraulic fracturing system for a well includes a processing module executing code and configured to receive a plurality of input parameters. The processing module can predict either a bottomhole pressure, based on statistical predictions and physics-based predictions, or a surface pressure based on the predicted bottomhole pressure.Type: ApplicationFiled: September 7, 2023Publication date: December 28, 2023Inventors: Leen Weijers, Andrew Bonnell, Ely Lolon, Zhijun Liu, Karn Agarwal, Robert Henderson, Michael Mayerhofer
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Publication number: 20230300969Abstract: Disclosed herein is a method of manufacturing a radio frequency cavity resonator, wherein said radio frequency cavity resonator comprises a tubular structure extending along a longitudinal axis, said tubular structure comprising a circumferential wall structure surrounding said longitudinal axis, one or more tubular elements and a first and a second support structure associated with each of said tubular elements, wherein said first and second support structures are provided on opposite sides of each tubular element and extend radially along a diameter of the tubular structure, wherein the method comprises producing the resonator by additive manufacturing in a manufacturing direction that is parallel to said diameter.Type: ApplicationFiled: July 9, 2021Publication date: September 21, 2023Inventors: Günther DOLLINGER, Michael MAYERHOFER
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Patent number: 11754747Abstract: A system for determining pressure in a hydraulic fracturing system for a well includes a processing module executing code and configured to receive a plurality of input parameters. The processing module can predict either a bottomhole pressure, based on statistical predictions and physics-based predictions, or a surface pressure based on the predicted bottomhole pressure.Type: GrantFiled: July 14, 2022Date of Patent: September 12, 2023Assignee: LIBERTY OILFIELD SERVICES LLCInventors: Leen Weijers, Andrew Bonnell, Ely Lolon, Zhijun Liu, Kam Agarwal, Robert Henderson, Michael Mayerhofer
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Patent number: 10431708Abstract: An integrated circuit including ESD device is disclosed. One embodiment includes a semiconductor region being electrically isolated from adjacent semiconductor regions by an isolating region. Both an ESD device and a device configured to emit radiation are formed within the semiconductor region.Type: GrantFiled: September 22, 2015Date of Patent: October 1, 2019Assignee: Infineon Technologies AGInventors: Michael Mayerhofer, Joost Willemen, David Johnsson
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Patent number: 9953968Abstract: An integrated circuit having an ESD protection structure is described. One embodiment includes a circuit section interconnected with a first terminal and with a second terminal and being operable at voltage differences between the first terminal and second terminal of greater than +10 V and less than ?10 V. The integrated circuit additionally includes an ESD protection structure operable to protect the circuit section against electrostatic discharge between the first terminal and the second terminal. The ESD protection structure is operable with voltage differences between the first and second terminals of greater than +10 V and less than ?10 V without triggering. The ESD protection structure is electrically and optically coupled to a photon source such that photons emitted by the photon source upon ESD pulse loading are absorbable in the ESD protection structure and an avalanche breakdown is initiatable by electron-hole pairs generated by the absorbed photons.Type: GrantFiled: February 23, 2015Date of Patent: April 24, 2018Assignee: Infineon Technologies AGInventors: Yiqun Cao, Ulrich Glaser, Magnus-Maria Hell, Julien Lebon, Michael Mayerhofer, Andreas Meiser, Matthias Stecher, Joost Willemen
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Patent number: 9705026Abstract: A method of triggering avalanche breakdown in a semiconductor device includes providing an electrical coupling and an optical coupling between an auxiliary semiconductor device configured to emit radiation and the semiconductor device including a pn junction between a first layer of a first conductivity type buried below a surface of a semiconductor body and a doped semiconductor region of a second conductivity type disposed between the surface and the first layer. The electrical and optical coupling includes triggering emission of radiation by the auxiliary semiconductor device and triggering avalanche breakdown in the semiconductor device by absorption of the radiation in the semiconductor device.Type: GrantFiled: January 28, 2016Date of Patent: July 11, 2017Assignee: Infineon Technologies AGInventors: Joost Willemen, Michael Mayerhofer, Ulrich Glaser, Yiqun Cao, Andreas Meiser, Magnus-Maria Hell, Matthias Stecher, Julien Lebon
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Publication number: 20160225932Abstract: A method of triggering avalanche breakdown in a semiconductor device includes providing an electrical coupling and an optical coupling between an auxiliary semiconductor device configured to emit radiation and the semiconductor device including a pn junction between a first layer of a first conductivity type buried below a surface of a semiconductor body and a doped semiconductor region of a second conductivity type disposed between the surface and the first layer. The electrical and optical coupling includes triggering emission of radiation by the auxiliary semiconductor device and triggering avalanche breakdown in the semiconductor device by absorption of the radiation in the semiconductor device.Type: ApplicationFiled: January 28, 2016Publication date: August 4, 2016Inventors: Joost Willemen, Michael Mayerhofer, Ulrich Glaser, Yiqun Cao, Andreas Meiser, Magnus-Maria Hell, Matthias Stecher, Julien Lebon
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Patent number: 9263619Abstract: A semiconductor component includes an auxiliary semiconductor device configured to emit radiation. The semiconductor component further includes a semiconductor device. An electrical coupling and an optical coupling between the auxiliary semiconductor device and the semiconductor device are configured to trigger emission of radiation by the auxiliary semiconductor device and to trigger avalanche breakdown in the semiconductor device by absorption of the radiation in the semiconductor device. The semiconductor device includes a pn junction between a first layer of a first conductivity type buried below a surface of a semiconductor body and a doped semiconductor region of a second conductivity type disposed between the surface and the first layer.Type: GrantFiled: September 6, 2013Date of Patent: February 16, 2016Assignee: Infineon Technologies AGInventors: Joost Willemen, Michael Mayerhofer, Ulrich Glaser, Yiqun Cao, Andreas Meiser, Magnus-Maria Hell, Matthias Stecher, Julien Lebon
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Publication number: 20160013354Abstract: An integrated circuit including ESD device is disclosed. One embodiment includes a semiconductor region being electrically isolated from adjacent semiconductor regions by an isolating region. Both an ESD device and a device configured to emit radiation are formed within the semiconductor region.Type: ApplicationFiled: September 22, 2015Publication date: January 14, 2016Applicant: INFINEON TECHNOLOGIES AGInventors: Michael Mayerhofer, Joost Willemen, David Johnsson
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Patent number: 9159719Abstract: A two-stage protection device for an electronic component protects against transient disturbances. The electronic component may be a semiconductor component, and may include one or multiple transistors and/or an integrated circuit. The protection device is connected to at least a first contact and a second contact of the electronic component, and is disposed essentially in parallel to the component that is to be protected, between the first contact and the second contact. The protection device includes a first stage with at least one diode and a second stage separated from the first stage by a resistor. The second stage includes at least one diode arrangement having two back-to-back disposed diodes which are disposed cathode-to-cathode.Type: GrantFiled: July 25, 2013Date of Patent: October 13, 2015Assignee: Infineon Technologies AGInventors: Michael Mayerhofer, Andrei Cobzaru, Adrian Finney, Ulrich Glaser, Gilles Guerrero, Bogdan-Eugen Matei, Markus Mergens
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Patent number: 9142592Abstract: An integrated circuit including ESD device is disclosed. One embodiment includes a semiconductor region being electrically isolated from adjacent semiconductor regions by an isolating region. Both an ESD device and a device configured to emit radiation are formed within the semiconductor region.Type: GrantFiled: April 9, 2009Date of Patent: September 22, 2015Assignee: Infineon Technologies AGInventors: Michael Mayerhofer, Joost Willemen, David Johnsson
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Publication number: 20150249078Abstract: An integrated circuit having an ESD protection structure is described. One embodiment includes a circuit section interconnected with a first terminal and with a second terminal and being operable at voltage differences between the first terminal and second terminal of greater than +10 V and less than ?10 V. The integrated circuit additionally includes an ESD protection structure operable to protect the circuit section against electrostatic discharge between the first terminal and the second terminal. The ESD protection structure is operable with voltage differences between the first and second terminals of greater than +10 V and less than ?10 V without triggering. The ESD protection structure is electrically and optically coupled to a photon source such that photons emitted by the photon source upon ESD pulse loading are absorbable in the ESD protection structure and an avalanche breakdown is initiatable by electron-hole pairs generated by the absorbed photons.Type: ApplicationFiled: February 23, 2015Publication date: September 3, 2015Inventors: Yiqun Cao, Ulrich Glaser, Magnus-Maria Hell, Julien Lebon, Michael Mayerhofer, Andreas Meiser, Matthias Stecher, Joost Willemen
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Publication number: 20150069424Abstract: A semiconductor component includes an auxiliary semiconductor device configured to emit radiation. The semiconductor component further includes a semiconductor device. An electrical coupling and an optical coupling between the auxiliary semiconductor device and the semiconductor device are configured to trigger emission of radiation by the auxiliary semiconductor device and to trigger avalanche breakdown in the semiconductor device by absorption of the radiation in the semiconductor device. The semiconductor device includes a pn junction between a first layer of a first conductivity type buried below a surface of a semiconductor body and a doped semiconductor region of a second conductivity type disposed between the surface and the first layer.Type: ApplicationFiled: September 6, 2013Publication date: March 12, 2015Inventors: Joost Willemen, Michael Mayerhofer, Ulrich Glaser, Yiqun Cao, Andreas Meiser, Magnus-Maria Hell, Matthias Stecher, Julien Lebon
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Publication number: 20140029145Abstract: A two-stage protection device for an electronic component protects against transient disturbances. The electronic component may be a semiconductor component, and may include one or multiple transistors and/or an integrated circuit. The protection device is connected to at least a first contact and a second contact of the electronic component, and is disposed essentially in parallel to the component that is to be protected, between the first contact and the second contact. The protection device includes a first stage with at least one diode and a second stage separated from the first stage by a resistor. The second stage includes at least one diode arrangement having two back-to-back disposed diodes which are disposed cathode-to-cathode.Type: ApplicationFiled: July 25, 2013Publication date: January 30, 2014Inventors: Michael Mayerhofer, Andrei Cobzaru, Adrian Finney, Ulrich Glaser, Gilles Guerrero, Bogdan-Eugen Matei, Markus Mergens
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Patent number: 7978451Abstract: A description is given of a circuit arrangement including at least one electronic component having first and second terminals, and comprising an ESD protection arrangement against disturbance pulses, is the ESD protection arrangement connected via connection terminals in parallel with the electronic component between the first and second terminals. The ESD protection arrangement includes a first ESD protection unit and a second ESD protection unit, that is connected in parallel with the first ESD protection unit and that reacts more rapidly than the first protection unit to a voltage rise at the connection terminals with the formation of a conductive current path between the connection terminals.Type: GrantFiled: September 12, 2008Date of Patent: July 12, 2011Assignee: Infineon Technologies AGInventors: Markus Mergens, Magnus-Maria Hell, Michael Mayerhofer
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Publication number: 20100259857Abstract: An integrated circuit including ESD device is disclosed. One embodiment includes a semiconductor region being electrically isolated from adjacent semiconductor regions by an isolating region. Both an ESD device and a device configured to emit radiation are formed within the semiconductor region.Type: ApplicationFiled: April 9, 2009Publication date: October 14, 2010Applicant: Infineon Technologies AGInventors: Michael Mayerhofer, Joost Willemen, David Johnsson
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Patent number: 7738222Abstract: A circuit arrangement for protecting an integrated semiconductor circuit includes a protection circuit connected between an element to be protected and a reference potential. The protection circuit includes a thyristor structure. The circuit arrangement also includes a control circuit configured to drive the protection circuit by generating a plurality of control signals drive an active element of the protection circuit.Type: GrantFiled: February 14, 2005Date of Patent: June 15, 2010Assignee: Austriamicrosystems AGInventors: Bernd Deutschmann, Bernd Fankhauser, Michael Mayerhofer, Pawel Chojecki
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Publication number: 20090073620Abstract: A description is given of a circuit arrangement including at least one electronic component having first and second terminals, and comprising an ESD protection arrangement against disturbance pulses, is the ESD protection arrangement connected via connection terminals in parallel with the electronic component between the first and second terminals. The ESD protection arrangement includes a first ESD protection unit and a second ESD protection unit, that is connected in parallel with the first ESD protection unit and that reacts more rapidly than the first protection unit to a voltage rise at the connection terminals with the formation of a conductive current path between the connection terminals.Type: ApplicationFiled: September 12, 2008Publication date: March 19, 2009Inventors: Markus Mergens, Magnus-Maria Hell, Michael Mayerhofer
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Publication number: 20080285199Abstract: What are proposed are a circuit arrangement and a method for protecting an integrated semiconductor circuit containing a protection circuit having a thyristor structure (SCR) and also a control circuit (TC; C1, R1, I1 to I3) for driving the protection circuit, which are both connected between an element (PV, LV) to be protected and a reference potential (VB), the control circuit (TC; C1, R1, I1 to I3) generating a plurality of control signals which in each case drive an active element (T1, T2) of the thyristor structure. A targeted triggering of the protection circuit in conjunction with defined switching thresholds and short turn-on times is thereby achieved. A possibility for determining the duration of the activation of the control circuit is furthermore proposed.Type: ApplicationFiled: February 14, 2005Publication date: November 20, 2008Inventors: Bernd Deutschmann, Bernd Frankhauser, Michael Mayerhofer, Pawel Chojecki
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Patent number: 7423855Abstract: A circuit arrangement includes an RC element connected between a first supply potential line and a second supply potential line. The RC element includes a first resistor and a first capacitor. The circuit arrangement also includes a plurality of inverters connected in series and having junction points between the inverters in the plurality of inverters. An input of the plurality of inverters is connected to a point between the first resistor and the first capacitor. The circuit arrangement also includes a protection transistor and a plurality of resistors.Type: GrantFiled: October 21, 2004Date of Patent: September 9, 2008Assignee: Austriamicrosystems AGInventors: Bernd Fankhauser, Michael Mayerhofer