Abstract: At least a p-type and n-type semiconductor device deposited upon a semiconductor wafer containing metal or metal alloy gates. More particularly, a complementary metal-oxide-semiconductor (CMOS) device is formed on a semiconductor wafer having n-type and p-type metal gates.

Abstract: A method including combining a silicon source precursor and a nitrogen source precursor at a temperature up to 550° C.; and forming a silicon nitride film. A system including a chamber; a silicon precursor source coupled to the chamber; a controller configured to control the introduction into the chamber of a silicon precursor from the silicon precursor source; and a memory coupled to the controller comprising a machine-readable medium having a machine-readable program embodied therein for directing operation of the system, the machine-readable program including instructions for controlling the second precursor source to introduce an effective amount of silicon precursor into the chamber at a temperature up to 550° C.

Abstract: A substrate patterning integration is disclosed to address structural and process limitations of conventional resist patterning over hardmask techniques. A resist layer positioned adjacent a substrate layer is patterned, subsequent to which a hardmask layer is deposited. The hardmask layer may be thinned to expose remaining portions of the patterned resist layer for removal by chemical treatment to expose portions of the underlying substrate layer into which the pattern may be transferred using wet or dry chemical etch techniques.