Abstract: This invention relates to a control circuit for a buck power factor correction (PFC) stage. Buck PFC stages are commonly used in low cost, high efficiency power converters. These buck PFC stages are typically controlled using a very slow control loop with a crossover frequency of the order of 10 to 20 Hz. However, such a slow response is unsuitable for applications requiring overvoltage protection. The present invention overcomes the problems with the known control circuits for buck PFC stages by implementing a two stage control circuit having a fast outer loop control circuit and a slow inner loop control circuit. The fast outer loop control circuit is in operation during low load conditions and the slow inner loop control circuit is only active under load.

Abstract: Provided are techniques for compressing a text string that includes multiple parameter keys and multiple corresponding parameter values. In an example embodiment, the techniques include identifying the parameter keys and determining corresponding parameter key identifiers. In this embodiment, a first portion of a compressed URL is generated as a string of unique parameter key identifiers that corresponds to the plurality of parameter key identifiers. A second portion of the compressed URL is generated as a parameter value list that corresponds to the string of the plurality of unique parameter key identifiers and to corresponding ones of the plurality of parameter values. In addition to the foregoing, other techniques are described in the figures, description, and claims.

Abstract: This invention relates to a control circuit for a buck power factor correction (PFC) stage. Buck PFC stages are commonly used in low cost, high efficiency power converters. These buck PFC stages are typically controlled using a very slow control loop with a crossover frequency of the order of 10 to 20 Hz. However, such a slow response is unsuitable for applications requiring overvoltage protection. The present invention overcomes the problems with the known control circuits for buck PFC stages by implementing a two stage control circuit having a fast outer loop control circuit and a slow inner loop control circuit. The fast outer loop control circuit is in operation during low load conditions and the slow inner loop control circuit is only active under load.

Abstract: The invention relates to a power converter (1) comprising a magnetic core (3) and a plurality of sub-converters each having a primary winding (17, 19) and a secondary winding. The magnetic core (3) comprises an inner leg (7) and a plurality of outer legs (5, 9), each of the outer legs (5, 9) having a gap (11, 13) formed therein. The primary winding (17) of one sub-converter is wound around an outer leg and the primary winding (19) of another sub-converter is wound around another outer leg. The primary windings (17, 19) are formed from a unitary winding (21) which is wound around the legs (5, 7, 9) in a continuous fashion. The primary windings (17, 19) are mounted on a printed circuit board (PCB) (15) and interconnects between turns of the primary windings are achieved using vias (27, 29) at the ends (23, 25) of the unitary winding. The vias may be conveniently placed in the corner sections or the PCB (15).

Abstract: A heavy duty cycle power converter (2) has current mode control in which the closed loop control is carried out by a controller (5) using a desired signal (11) which is a function of the difference between the desired duty cycle (7) and the measured duty cycle (6). This fluctuates current mode control without voltage feedback.

Abstract: The present invention provides a method and system for estimating the optimum service rate or bandwidth requirement (BWR) for a switch or router in a communications network for a particular traffic flow which contains elastic traffic, i.e. traffic subject to a feedback mechanism. The invention provides an iterative technique to estimate the optimum service rate from calculated BWRs for the particular traffic flow without initially knowing the precise form of the BWR for various service rates at a buffer of a switch. This is done by initially configuring a service capacity, calculating the BWR to configure a new service capacity and repeating this until the calculated BWR and configured service capacity coincide.

Abstract: A toy includes a device that defines a perimeter and a control unit coupled to the boundary device. The control unit includes a detector that senses an event, an output device, and a controller. The controller receives input from the detector and sends an output signal to the output device when the detector senses an event that occurs within the perimeter.

Abstract: An interface device is configured to provide for flexible and real-time communications between financial transaction systems and financial administration systems, retailer administration systems or the like. The operation of the interface device is predicated on a knowledge of the type of financial transaction device, including data formats, data content and physical attributes. The use of the interface allows what is known as ‘legacy’ hardware to communicate in real-time to financial and/or retail administration networks in situations where otherwise incompatible data formats or an intrinsic inability to communicate with networks and such systems would be the case. Applications of the invention include monitoring customer loyalty transactions, actioning real-time EFTPOS and EPOS transactions including credit and debit types.