Patents by Inventor Michael Meeder

Michael Meeder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Using an interconnect bump to traverse through a passivation layer of a semiconductor die
    Patent number: 10777524
    Abstract: A semiconductor die, which includes a first semiconductor device, a first passivation layer, and a first interconnect bump, is disclosed. The first passivation layer is over the first semiconductor device, which includes a first group of device fingers. The first interconnect bump is thermally and electrically connected to each of the first group of device fingers. Additionally, the first interconnect bump protrudes through a first opening in the first passivation layer.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: September 15, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Thomas Scott Morris, Michael Meeder
  • USING AN INTERCONNECT BUMP TO TRAVERSE THROUGH A PASSIVATION LAYER OF A SEMICONDUCTOR DIE
    Publication number: 20180366431
    Abstract: A semiconductor die, which includes a first semiconductor device, a first passivation layer, and a first interconnect bump, is disclosed. The first passivation layer is over the first semiconductor device, which includes a first group of device fingers. The first interconnect bump is thermally and electrically connected to each of the first group of device fingers. Additionally, the first interconnect bump protrudes through a first opening in the first passivation layer.
    Type: Application
    Filed: August 27, 2018
    Publication date: December 20, 2018
    Inventors: Thomas Scott Morris, Michael Meeder
  • Electrostatic discharge (ESD) protection of capacitors using lateral surface Schottky diodes
    Patent number: 9698137
    Abstract: Electrostatic Discharge (ESD) protection using lateral surface Schottky diodes is disclosed. In one embodiment, a Metal-Insulator-Metal (MIM) capacitor with ESD protection comprises a group III-V substrate, a first metal layer contacting the substrate, an insulation layer formed over the first metal layer, and a second metal layer formed over the insulation layer and also contacting the substrate. A MIM capacitor is formed by overlapping portions of the first metal layer, the insulation layer, and the second metal layer. First and second Schottky diodes are formed where the first and second metal layers, respectively, contact the substrate, such that the cathodes of the Schottky diodes are electrically connected to one another and the anodes of the Schottky diodes are electrically connected to the respective overlapping portions of the first and second metal layers.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: July 4, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Peter J. Zampardi, Brian G. Moser, Michael Meeder, Venkata Chivukula
  • ESD PROTECTION OF CAPACITORS USING LATERAL SURFACE SCHOTTKY DIODES
    Publication number: 20170103976
    Abstract: Electrostatic Discharge (ESD) protection using lateral surface Schottky diodes is disclosed. In one embodiment, a Metal-Insulator-Metal (MIM) capacitor with ESD protection comprises a group III-V substrate, a first metal layer contacting the substrate, an insulation layer formed over the first metal layer, and a second metal layer formed over the insulation layer and also contacting the substrate. A MIM capacitor is formed by overlapping portions of the first metal layer, the insulation layer, and the second metal layer. First and second Schottky diodes are formed where the first and second metal layers, respectively, contact the substrate, such that the cathodes of the Schottky diodes are electrically connected to one another and the anodes of the Schottky diodes are electrically connected to the respective overlapping portions of the first and second metal layers.
    Type: Application
    Filed: June 27, 2016
    Publication date: April 13, 2017
    Inventors: Peter J. Zampardi, Brian G. Moser, Michael Meeder, Venkata Chivukula
  • USING AN INTERCONNECT BUMP TO TRAVERSE THROUGH A PASSIVATION LAYER OF A SEMICONDUCTOR DIE
    Publication number: 20170018520
    Abstract: A semiconductor die, which includes a first semiconductor device, a first passivation layer, and a first interconnect bump, is disclosed. The first passivation layer is over the first semiconductor device, which includes a first group of device fingers. The first interconnect bump is thermally and electrically connected to each of the first group of device fingers. Additionally, the first interconnect bump protrudes through a first opening in the first passivation layer.
    Type: Application
    Filed: September 28, 2016
    Publication date: January 19, 2017
    Inventors: Thomas Scott Morris, Michael Meeder
  • USING AN INTERCONNECT BUMP TO TRAVERSE THROUGH A PASSIVATION LAYER OF A SEMICONDUCTOR DIE
    Publication number: 20140021603
    Abstract: A semiconductor die, which includes a first semiconductor device, a first passivation layer, and a first interconnect bump, is disclosed. The first passivation layer is over the first semiconductor device, which includes a first group of device fingers. The first interconnect bump is thermally and electrically connected to each of the first group of device fingers. Additionally, the first interconnect bump protrudes through a first opening in the first passivation layer.
    Type: Application
    Filed: July 23, 2013
    Publication date: January 23, 2014
    Applicant: RF Micro Devices, Inc.
    Inventors: Thomas Scott Morris, Michael Meeder