Abstract: A method and computer program product for determining an internal temperature of a computing device, a power consumption factor for the computing device, and an airflow factor for the computing device. An approximated ambient air temperature is generated based upon the internal temperature, power consumption factor, and the airflow factor. A workload factor is determined for the computing device and a fan speed for the computing device is controlled based at least in part upon the approximated ambient air temperature and the workload factor.

Abstract: A system for powering on downstream devices includes a master device; a first slave device; and a first communication link connecting the master device to the slave device for enabling the master device to transmit data signals to the slave device. The master device includes a power-on signal generator for injecting a power-on signal onto the communication link and the first slave device includes a power-on signal receiver for detecting the power-on signal injected on the communication link by the power-on signal generator and powering on the first slave device.

Abstract: An improved multi-tasking executable program has executable code which includes a main section defined by a main portion of source code, and a set of task sections defined by a set of task portions of the source code. Each task section has (i) a “jump_to_address” section defined by expansion of a “jump_to_address” macro of the source code, and (ii) multiple entry points defined by multiple expansions of a “breakout” macro of the source code. When the executable code is executed by a processor of the subsystem, the main section is configured to invoke each task section in a cyclical manner, and the “jump_to_address” section of each task section is configured to jump execution to one of the multiple entry points of that task section.

Abstract: Described is an electronics system having an individually replaceable electronics module installed therein. The individually replaceable electronics module includes a component, a light-emitting device (LED) disposed near the component, a processor module for performing diagnostics on the component and producing a message based on results of the diagnostics, and a microcontroller in communication with the processor module to receive the message produced by the processor module. The microcontroller determines whether the component is faulting based on the message. A DC power source is coupled to supply power to the microcontroller after the individually replaceable electronics module is electrically disconnected from the electronics system so that the microcontroller can illuminate the LED if the received message indicates that the component is faulting.

Abstract: An interface for coupling data between a host computer/server and a bank of disk drives. The interface includes a chassis having disposed therein: a pair of storage processors adapted for coupling to the host computer/server; and, a pair of management controllers in communication one with the other through a communication link. The management controllers monitor elements of the interface including fans and power supplies and control such elements in response to massages passing between the management controllers.

Abstract: A data storage system includes a first and second boards disposed in a chassis. The first board has disposed thereon a first Serial Attached Small Computer Systems Interface (SAS) expander, a first management controller (MC) in communication with the first SAS expander, and management resources accessible to the first MC. The second board has disposed thereon a second SAS expander and a second MC. The system also has a communications link between the first and second MCs. Primary access to the management resources is provided in a first path which is through the first SAS expander and the first MC, and secondary access to the first management resources is provided in a second path which is through the second SAS expander and the second MC.

Abstract: A system for detecting a fault in a power supply having at least one power supply unit and a redundant power supply unit. The system includes a printed circuit board and a common voltage bus disposed on the printed circuit board. A plurality of diodes is disposed on the printed circuit board having first electrodes connected to the common voltage supply bus. The diodes have second electrodes connected to a corresponding one of the at least one power supply unit and the redundant power supply unit. The diodes are connected to the common bus in a logic OR configuration. A controller, disposed on the printed circuit board, is fed by a voltage at the second electrode of a corresponding one of the diodes and a reference voltage for determining whether the voltage at the second electrode of the corresponding one of the diodes is producing a predetermined voltage relative to the reference voltage.

Abstract: A fault tolerant distributed intelligence control system for sensing and control across fault tolerant fiber optic communication media interconnecting a plurality of intelligent nodes. Each intelligent node comprises a digital control and communication processor (DCCP) operating autonomously in relation to DCCPs at other nodes, and a transceiver for interfacing with the communication media. The fiber optic communication media comprises bi-directional serial data buses. The combination provides a low cost highly reliable distributed control system particularly applicable to primary and secondary aircraft control systems, as well as to other vehicle and control systems.

Abstract: An intelligent voting node for a multiple node, fault tolerant, distributed intelligence control system having a plurality of optically isolated relays for connecting a power source to a load device and providing total optical isolation for processors of the voting node from faults occurring in the power source. The voting node includes triple redundant two-out-of-three voters each coupled to one of three redundant digital communication and control processors within the node. Built-in-self-test capability using optically isolated receiver devices provides for avoidance of latent failures.

Abstract: A deterministic network protocol for connecting critical sensors, actuators and computing elements on a bi-directional, time-multiplexed, fiber optic or other media data bus, such that critical messages have concisely bounded latency and non-critical messages may be sent without impacting critical messages. It is a unique combination of a time-slot allocation protocol and a contention-based protocol in which global synchronization information is passed on the data media via a synchronization beacon.