Abstract: Disclosed is a method of modular multiplication of two L-bit numbers (X, Y), the result defined from XY+mM, where M is the modulo, of L bits, and m is a number of L bits found and is divisible by 2L. L/k iterations are performed, an iteration i involving XYi+miM+R, Yi, mi being k-bit digits of rank i of Y, m from least significant bits, and R the previous iteration result. In each iteration, a first sub-loop of k/p iterations calculates a partial result of XYi+miM+R on k least significant bits of X, M, R, following decomposition of X, mi into p-bit digits. Starting each sub-loop iteration, the p bits of the current digit of mi are simultaneously produced. A second sub-loop calculates and sums the remaining partial results of XYi+miM+R using mi from the first sub-loop.

Abstract: A circuit for calculating a sum of products, each product having a q-bit binary operand and a k-bit binary operand, where k is a multiple of q, includes a q-input carry-save adder (CSA); a multiplexer (10) by input of the adder, having four k-bit channels respectively receiving the value 0, a first (Yi) of the k-bit operands, the second k-bit operand (M[63:0], mi), and the sum of the two k-bit operands, the output of a multiplexer of rank t (where t is between 0 and q?1) being taken into account by the adder with a t-bit left shift; and each multiplexer having first and second path selection inputs, the bits of a first of the q-bit operands being respectively supplied to the first selection inputs, and the bits of the second q-bit operand being respectively supplied to the second selection inputs.

Abstract: Disclosed is a method of modular multiplication of two L-bit numbers (X, Y), the result defined from XY+mM, where M is the modulo, of L bits, and m is a number of L bits found and is divisible by 2L. L/k iterations are performed, an iteration i involving XYi+miM+R, Yi, mi being k-bit digits of rank i of Y, m from least significant bits, and R the previous iteration result. In each iteration, a first sub-loop of k/p iterations calculates a partial result of XYi+miM+R on k least significant bits of X, M, R, following decomposition of X, mi into p-bit digits. Starting each sub-loop iteration, the p bits of the current digit of mi are simultaneously produced. A second sub-loop calculates and sums the remaining partial results of XYi+miM+R using mi from the first sub-loop.

Abstract: A circuit for calculating a sum of products, each product having a q-bit binary operand and a k-bit binary operand, where k is a multiple of q,includes a q-input carry-save adder (CSA); a multiplexer (10) by input of the adder, having four k-bit channels respectively receiving the value 0, a first (Yi) of the k-bit operands, the second k-bit operand (M[63:0], mi), and the sum of the two k-bit operands, the output of a multiplexer of rank t (where t is between 0 and q?1) being taken into account by the adder with a t-bit left shift; and each multiplexer having first and second path selection inputs, the bits of a first of the q-bit operands being respectively supplied to the first selection inputs, and the bits of the second q-bit operand being respectively supplied to the second selection inputs.

Abstract: An improved surface testing apparatus, such as a scratch test apparatus, allows accurate determination of the test speed, for example using one or more magnetic sensors. An example scratch test apparatus comprises an arm assembly, and an attached blade moving over the surface during the scratch test. A pair of spaced apart reed switches are provided proximate to the arm assembly, the reed switches being successively actuated by a magnetic portion of the arm asssembly as it moves during the scratch test.

Abstract: A brake tensioner is formed from an elongage member made of a material which will yield when a predetermined tensile load is applied thereto, the elongate member is bent and twisted together adjacent its mid point to produce an eye formation for engagement of a fastener by which it may be attached to a brake control lever, the free ends of the longate member diverging away from the eye formation and having hook formations, for engagement of an eye formation formed on the end of a brake control cable.