Patents by Inventor Michael Niendorf

Michael Niendorf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935875
    Abstract: A power semiconductor module arrangement includes a power electronics substrate comprising a first DC voltage pad, a second DC voltage pad, a first load pad, and a second load pad, first and second transistor dies mounted on the first load pad, third and fourth transistor dies mounted the first DC voltage pad, the first and second transistor dies collectively form a first switch, the third and fourth transistor dies collectively form a second switch, the first and second DC voltage pads are arranged such that a DC supply impedance for a first commutation loop that flows through the first and third transistor dies matches a DC supply impedance for a second commutation loop that flows through the second and fourth transistor dies, and an impedance of a first load connection to the third transistor die is greater than an impedance of a second load connection to the fourth transistor die.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: March 19, 2024
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Waldemar Jakobi, Michael Niendorf
  • Patent number: 11682611
    Abstract: A power semiconductor module includes a leadframe having a first die pad, a second die pad separated from the first die pad, a first power lead formed as an extension of the first die pad, a second power lead separated from the first and second die pads, and a first connection region formed as an extension of the second power lead alongside the second die pad. A first plurality of power semiconductor dies is attached to the first die pad and electrically coupled in parallel. A second plurality of power semiconductor dies is attached to the second die pad and electrically coupled in parallel. A first electrical connection extends between the first plurality of power semiconductor dies and the second die pad in a first direction. A second electrical connection extends between the second plurality of power semiconductor dies and the first connection region in the first direction.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: June 20, 2023
    Assignee: Infineon Technologies AG
    Inventors: Michael Niendorf, Ludwig Busch, Oliver Markus Kreiter, Christian Neugirg, Ivan Nikitin
  • Publication number: 20230170333
    Abstract: A power semiconductor module arrangement includes a power electronics substrate comprising a first DC voltage pad, a second DC voltage pad, a first load pad, and a second load pad, first and second transistor dies mounted on the first load pad, third and fourth transistor dies mounted the first DC voltage pad, the first and second transistor dies collectively form a first switch, the third and fourth transistor dies collectively form a second switch, the first and second DC voltage pads are arranged such that a DC supply impedance for a first commutation loop that flows through the first and third transistor dies matches a DC supply impedance for a second commutation loop that flows through the second and fourth transistor dies, and an impedance of a first load connection to the third transistor die is greater than an impedance of a second load connection to the fourth transistor die.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 1, 2023
    Inventors: Tomas Manuel Reiter, Waldemar Jakobi, Michael Niendorf
  • Patent number: 11621204
    Abstract: A semiconductor module includes: a dual-gauge leadframe having thicker and thinner parts, part of the thinner part forming a high voltage lead; a semiconductor die attached to the thicker part; and a molding compound (MC) encapsulating the die. The thicker leadframe part is disposed at a bottom side of the MC. A side face of the MC has a stepped region between the high voltage lead and thicker leadframe part. A first generally vertical part of the stepped region extends from the high voltage lead to the generally horizontal part, a generally horizontal part of the stepped region extends to the second generally vertical part, and a second generally vertical part of the stepped region extends to the bottom side of the MC. A linear dimension of the generally horizontal part as measured from the first generally vertical part to the second generally vertical part is at least 4.5 mm.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: April 4, 2023
    Assignee: Infineon Technologies AG
    Inventors: Oliver Markus Kreiter, Ludwig Busch, Angel Enverga, Mei Fen Hiew, Tian See Hoe, Elvis Keli, Kean Ming Koe, Sanjay Kumar Murugan, Michael Niendorf, Ivan Nikitin, Bernhard Stiller, Thomas Stoek, Ke Yan Tean
  • Publication number: 20220262693
    Abstract: A semiconductor module includes: a dual-gauge leadframe having thicker and thinner parts, part of the thinner part forming a high voltage lead; a semiconductor die attached to the thicker part; and a molding compound (MC) encapsulating the die. The thicker leadframe part is disposed at a bottom side of the MC. A side face of the MC has a stepped region between the high voltage lead and thicker leadframe part. A first generally vertical part of the stepped region extends from the high voltage lead to the generally horizontal part, a generally horizontal part of the stepped region extends to the second generally vertical part, and a second generally vertical part of the stepped region extends to the bottom side of the MC. A linear dimension of the generally horizontal part as measured from the first generally vertical part to the second generally vertical part is at least 4.5 mm.
    Type: Application
    Filed: February 17, 2021
    Publication date: August 18, 2022
    Inventors: Oliver Markus Kreiter, Ludwig Busch, Angel Enverga, Mei Fen Hiew, Tian See Hoe, Elvis Keli, Kean Ming Koe, Sanjay Kumar Murugan, Michael Niendorf, Ivan Nikitin, Bernhard Stiller, Thomas Stoek, Ke Yan Tean
  • Publication number: 20210398887
    Abstract: A power semiconductor module includes a leadframe having a first die pad, a second die pad separated from the first die pad, a first power lead formed as an extension of the first die pad, a second power lead separated from the first and second die pads, and a first connection region formed as an extension of the second power lead alongside the second die pad. A first plurality of power semiconductor dies is attached to the first die pad and electrically coupled in parallel. A second plurality of power semiconductor dies is attached to the second die pad and electrically coupled in parallel. A first electrical connection extends between the first plurality of power semiconductor dies and the second die pad in a first direction. A second electrical connection extends between the second plurality of power semiconductor dies and the first connection region in the first direction.
    Type: Application
    Filed: June 22, 2020
    Publication date: December 23, 2021
    Inventors: Michael Niendorf, Ludwig Busch, Oliver Markus Kreiter, Christian Neugirg, Ivan Nikitin