Abstract: A complementary depletion/enhancement mode (CDEM) gallium arsenide circuit utilizes switching pull-up/pull-down circuits to achieve low power consumption, and makes use of gallium arsenide field effect transistors to achieve high speed. High yield depletion mode field effect transistors are used to implement the sometimes complex complementary logic function in a pass gate configuration. Low yield enhancement mode FETs are used in the closely coupled and spaced tracking circuit. Closely spaced enhancement mode FETs are used because of the likelihood of their having closely matched thresholds.

Abstract: A data communications network has a transmission data channel wherein a plurality of network nodes are connected thereto according to a loop topology. Each node has a transceiver, a control switch for operating the node in either a pass through state, wherein received data from an upstream side of the channel is transmitted to the downstream side of the channel, or in a source transmit state wherein the node transmits its own message data to the downstream side of the channel while monitoring the upstream side. In the source transmit state, the node matches the received data with its transmitted data and truncates its transmission upon recognition of an error in the received message. In this manner, there is no requirement that the destination node acknowledge receipt of the data since the data received by the transmitting node is the most corrupted form of the data. The node further has a bus contention protocol wherein the node "backs off" from transmitting on the channel for a specific time-out duration.