Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: There is set forth herein a dimmer circuit for controlling delivery of input line voltage to a load. The dimmer circuit can include a switch coupling an input line voltage terminal to a load terminal. The dimmer circuit can be operative to provide one or more switch firing control scheme for latching the switch.

Abstract: A process for self testing a fault circuit includes disabling an actuator, performing a self test by creating a simulated fault signal across at least a portion of a half cycle of a first polarity and across at least a portion of a hall cycle of a second polarity, and determining whether the self test was successful.

Abstract: There is set forth herein a dimmer circuit for controlling delivery of input line voltage to a load. The dimmer circuit can include a switch coupling an input line voltage terminal to a load terminal. The dimmer circuit can be operative to provide one or more switch firing control scheme for latching the switch.

Abstract: An arc fault circuit interrupter is disclosed. This arc fault circuit interrupter can include any one or more of three different sensors such as a high frequency sensor, and any one of lower frequency sensors such as a current sensor or a differential sensor. The arc fault circuit interrupter can be configured as an in line arc fault circuit interrupter installed in a wall box. In addition, the arc fault circuit interrupter can include a processor configured to determine any one of a series arc fault, or a parallel arc fault.

Abstract: An apparatus to control an amount of current delivered from an AC power source to an electrical load includes a line terminal configured to be connected to the AC power source, a load terminal configured to be connected to the electrical load, a controllably conductive power switch in series electrical connection between the line terminal and the load terminal, and a switching circuit configured to control a conductive state of the controllably conductive power switch wherein the switching circuit is configured to automatically detect at least one electrical characteristic.

Abstract: An arc fault circuit interrupter is disclosed. This arc fault circuit interrupter can include any one or more of three different sensors such as a high frequency sensor, and any one of lower frequency sensors such as a current sensor or a differential sensor. The arc fault circuit interrupter can be configured as an in line arc fault circuit interrupter installed in a wall box. In addition, the arc fault circuit interrupter can include a processor configured to determine any one of a series arc fault, or a parallel arc fault.

Abstract: A timing device is disclosed which is for controlling electronic devices and which is mounted in a wall switch box. This timing device comprises at least one controller; at least one transceiver in communication with the controller; at least one interface; and at least one cover plate. This device can also include at least one key coupled to the cover plates for interacting with the interface when said cover plate is inserted onto said at least one interface.

Abstract: A universal serial bus charging device for charging connected electronic devices is presented. The universal serial bus includes a microprocessor and a power supply configured to output a total charging current. The universal serial bus charging device further includes a plurality of low voltage ports in communication with the microprocessor and electrically coupled to the power supply. Each of the plurality of low voltage ports are capable of connecting with the electronic devices and providing the electronic devices a device charging current. The microprocessor is configured to enumerate the connected electronic devices and communicate to each of the enumerated electronic devices the device charging current available through its respective low voltage port connection. The available device charging current for each enumerated electronic device is determined by the microprocessor as a function of a total charging current and the enumerated electronic devices.

Abstract: A dimmer is provided for controlling power to a load, the dimmer having a ground leakage power supply deriving power from a connection of the dimmer to ground. The power supply may be a switching-mode power supply that can be the sole or primary power supply to power operation of the dimmer, including operation of the controller.

Abstract: Circuit interrupting devices are provided. One circuit interrupting device includes a fault sensor configured to output a sensor signal; a voltage sensor configured to sense a reference voltage; and a controller configured to determine an occurrence of an actual fault based on the sensor signal and the reference voltage. The circuit interrupting device further includes an amplifier configured to receive the sensor signal and the reference voltage and output an amplified signal; an analog-to-digital converter configured to receive the reference voltage and the amplified signal and output respective digital signals corresponding to the reference voltage and the amplified signal; and a line interrupt assembly configured to interrupt current flow through a conductive path when a characteristic of the sensor signal exceeds an actual fault threshold.

Abstract: Circuit interrupting devices are provided. One circuit interrupting device includes a fault sensor configured to output a sensor signal; a voltage sensor configured to sense a reference voltage; and a controller configured to determine an occurrence of an actual fault based on the sensor signal and the reference voltage. The circuit interrupting device further includes an amplifier configured to receive the sensor signal and the reference voltage and output an amplified signal; an analog-to-digital converter configured to receive the reference voltage and the amplified signal and output respective digital signals corresponding to the reference voltage and the amplified signal; and a line interrupt assembly configured to interrupt current flow through a conductive path when a characteristic of the sensor signal exceeds an actual fault threshold.

Abstract: There is set forth herein a dimmer circuit for controlling delivery of input line voltage to a load. The dimmer circuit can include a switch coupling an input line voltage terminal to a load terminal. The dimmer circuit can he operative to provide one or more switch firing control scheme for latching the switch.

Abstract: The present disclosure generally provides controls, apparatus, systems and methods for controlling a ventilation mechanism to efficiently manage the relative humidity of an area. The controls, apparatus, systems and methods utilize sensed relative humidity information and one or more inputs to provide for efficient automatic and/or manual control a ventilation mechanism in response to high humidity events within the area. The controls, apparatus, systems and methods provided herein efficiently automatically activate a ventilation mechanism through the use of sensed relative humidity information and user input. The controls, apparatus, systems and methods provided herein efficiently automatically deactivate a ventilation mechanism through the use of sensed relative humidity information and user input.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit (IC) and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: An apparatus includes an interruption circuit in a power delivery path, and a fault detection circuit configured to provide a fault signal to selectively cause the interruption circuit to interrupt power delivery, wherein the fault detection circuit includes a fault detection integrated circuit and a sensing coil configured to sense a differential current between a phase conductive path and a neutral conductive path in the power delivery path. A processor is configured to selectively control a fault simulation circuit to simulate a fault in the power delivery path, detect a response of the fault detection circuit to the simulated fault, and determine if the response of the fault detection circuit is an expected response. The processor provides an override signal to the interruption circuit to prevent the interruption circuit from receiving a fault signal from the fault detection circuit during, and for a predetermined time after, the simulated fault.

Abstract: A method of sensing motion in a predetermined area is provided. The method may include using a digital output motion sensor to produce a digital output signal indicative of the presence of motion in the predetermined area. The method may further include transmitting the digital output signal along a signal path independent of analog amplification and filtering. The method may also include using a microprocessor coupled to the signal path to receive the digital output signal and to process the digital output signal.

Abstract: A universal serial bus charging device for charging connected electronic devices is presented. The universal serial bus includes a microprocessor and a power supply configured to output a total charging current. The universal serial bus charging device further includes a plurality of low voltage ports in communication with the microprocessor and electrically coupled to the power supply. Each of the plurality of low voltage ports are capable of connecting with the electronic devices and providing the electronic devices a device charging current. The microprocessor is configured to enumerate the connected electronic devices and communicate to each of the enumerated electronic devices the device charging current available through its respective low voltage port connection. The available device charging current for each enumerated electronic device is determined by the microprocessor as a function of a total charging current and the enumerated electronic devices.

Abstract: An arc fault circuit interrupter is disclosed. This arc fault circuit interrupter can include any one or more of three different sensors such as a high frequency sensor, and any one of lower frequency sensors such as a current sensor or a differential sensor. The arc fault circuit interrupter can be configured as an in line arc fault circuit interrupter installed in a wall box. In addition, the arc fault circuit interrupter can include a processor configured to determine any one of a series arc fault, or a parallel arc fault.

Abstract: A process for self testing a fault circuit includes disabling an actuator, performing a self test by creating a simulated fault signal across at least a portion of a half cycle of a first polarity and across at least a portion of a hall cycle of a second polarity, and determining whether the self test was successful.