Abstract: A battery network includes a plurality of heterogeneous batteries coupled to at least one energy source and one energy load, a plurality of switches coupled to the heterogeneous batteries, and the switches controllable having a duty cycle between 0 and 1. A controller is configured to characterize each of the plurality of heterogeneous batteries characteristics, determine duty cycles for each of the plurality of switches based on the characterization such that a charge applied from the at least one energy source or a discharge to the at least one energy load converges to a balanced state for the plurality of heterogeneous batteries, and apply the determined duty cycles to the plurality of switches.

Abstract: A battery network includes a plurality of heterogeneous batteries coupled to at least one energy source and one energy load, a plurality of switches coupled to the heterogeneous batteries, and the switches controllable having a duty cycle between 0 and 1. A controller is configured to characterize each of the plurality of heterogeneous batteries characteristics, determine duty cycles for each of the plurality of switches based on the characterization such that a charge applied from the at least one energy source or a discharge to the at least one energy load converges to a balanced state for the plurality of heterogeneous batteries, and apply the determined duty cycles to the plurality of switches.

Abstract: A solid-state power transformer circuit is provided for converting the positive and negative periods from an AC input signal having a predetermined frequency and applied to an input of the circuit into a high frequency signal and, subsequently, converting the high frequency signal into a regulated output signal at an output of the circuit. A plurality of electronic optically-coupled switches are utilized for chopping the AC input signal at a chopping frequency. The switches are controlled by the oscillator of an integrated circuit to adjust the duty cycle of the switches. A filter, in the form of a pair of capacitors, is connected between the input and output to suppress the high-frequency voltage harmonics produced during chopping. The capacitors, in combination with other capacitive and resistive elements of the circuit provide a total separation impedance between the input and output of the circuit to electrically isolate the output from the input.

Abstract: A parallel analog-to-digital ("A/D") converter utilizing only N comparators and at least N-1 summing networks made of the simple resistance elements. The A/D conversion process operates asynchronously without need for registers, a clock circuit or latches and determines at a high rate of speed the N output bits for a given analog input signal. Each of the summing networks produces a composite analog signal which is fed into a respective one of the comparators. The digital output bit produced by each comparator is fed into the summing networks associated with those comparators whose output bits are less significant. Accordingly, when all output bits are changing on account of a new analog input value, the converter determines the most significant bit first, the next most significant bit next, and so on, until the least significant bit is determined.