Patents by Inventor Michael Pas

Michael Pas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integration scheme for dual work function metal gates
    Patent number: 8748246
    Abstract: A transistor includes a semiconductor substrate includes having a gate hardmask over the gate electrode layer during the formation of transistor source/drain regions. An independent work function adjustment process implants Group IIIa series dopants into a gate polysilicon layer of a PMOS transistor and implants lanthanide series dopants into a gate polysilicon layer of a NMOS transistor.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: June 10, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Manfred Ramin, Michael Pas
  • Integration Scheme for Dual Work Function Metal Gates
    Publication number: 20110223754
    Abstract: A transistor includes a semiconductor substrate includes having a gate hardmask over the gate electrode layer during the formation of transistor source/drain regions. An independent work function adjustment process implants Group Ma series dopants into a gate polysilicon layer of a PMOS transistor and implants lanthanide series dopants into a gate polysilicon layer of a NMOS transistor.
    Type: Application
    Filed: December 10, 2010
    Publication date: September 15, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manfred Ramin, Michael Pas
  • Integration Scheme for Dual Work Function Metal Gates
    Publication number: 20090039439
    Abstract: A method for making PMOS and NMOS transistors 60, 70 on a semiconductor substrate includes having a gate hardmask over the gate electrode layer during the formation of transistor source/drain regions. The method includes an independent work function adjustment process that implants Group IIIa series dopants into a gate polysilicon layer of a PMOS transistor and implants Lanthanide series dopants into a gate polysilicon layer of NMOS.
    Type: Application
    Filed: October 21, 2008
    Publication date: February 12, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manfred Ramin, Michael Pas
  • Integration Scheme for Dual Work Function Metal Gates
    Publication number: 20080237743
    Abstract: A method for making PMOS and NMOS transistors 60, 70 on a semiconductor substrate includes having a gate hardmask over the gate electrode layer during the formation of transistor source/drain regions. The method includes an independent work function adjustment process that implants Group IIIa series dopants into a gate polysilicon layer of a PMOS transistor and implants Lanthanide series dopants into a gate polysilicon layer of NMOS.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manfred Ramin, Michael Pas