Abstract: Embodiments of a dust-proof and water-proof enclosure for a camera. The enclosure includes first and second housings joined along a diagonal plane with a sealing element positioned on the diagonal plane between the two housings. An optical assembly is secured to at least one optoelectronic housing, and the optoelectronic housing is secured to a sidewall of the first housing. At least one electrical connector is secured to the sidewall of the second housing that is opposite the sidewall of the first housing to which the optoelectronic housing is secured when the first and second housing are joined.

Abstract: The present invention relates generally to a sealing system and method. More particularly, the invention encompasses a method and a system for a camera enclosure sealing. The invention meets or exceeds the IP67 International Standard. The inventive camera enclosure sealing system provides an enclosure which is dust-proof and water-proof.

Abstract: Certain exemplary embodiments can provide a method that can comprise causing a signal to be transmitted from a digital camera via an input/output (I/O) circuit. The signal can be associated with an image obtained via the digital camera. The I/O circuit can be adapted to be communicatively coupled to the digital camera.

Abstract: Certain exemplary embodiments can provide a system that can comprise a digital camera. The system can comprise an input/output (I/O) circuit adapted to be communicatively coupled to the digital camera. The I/O circuit can be adapted to transmit signals to the digital camera. The I/O circuit can be adapted to transmit signals from the digital camera.

Abstract: Certain exemplary embodiments can provide a method that can comprise automatically rendering an image. The image can be transferred to a memory from a digital camera via a Field Programmable Gate Array (FPGA) device. The FPGA device can be adapted to transfer image information from the digital camera to a memory.

Abstract: A power control system and method controls power supplied from a power source to a resistive load, such as a LED illumination array, to prevent the load from exceeding a high temperature limit. The power control system and method generates a pulse train that represents heating in the load and uses digital logic to model the load temperature and calculate a temperature out value. When the temperature out value increases to reach a high temperature limit value, the power source is disconnected from the load. When the temperature out value decreases to reach a base temperature value, the power source is re-connected to the load.

Abstract: A power control system and method controls power supplied from a power source to a resistive load, such as a LED illumination array, to prevent the load from exceeding a high temperature limit. The power control system and method generates a pulse train that represents heating in the load and uses digital logic to model the load temperature and calculate a temperature out value. When the temperature out value increases to reach a high temperature limit value, the power source is disconnected from the load. When the temperature out value decreases to reach a base temperature value, the power source is re-connected to the load.

Abstract: A power control system, which serves to protect a dissipative/resistive load from exceeding a predetermined temperature limit. The power control system accurately models the temperature of the load and enforces a cooling period to reduce the temperature of the load being protected to a base temperature level if the predetermined temperature limit is reached. Also provided is a method of selectively connecting and disconnecting a resistive load to and from a power source to prevent the resistive load from exceeding a predetermined high temperature limit. The method includes sensing a voltage proportional to the instantaneous power passing through the resistive load by wiring a current sensing resistor in series with the resistive load. Then, a load temperature is modeled using a load temperature modeling circuit to produce an output voltage proportional to a present temperature of the resistive load.

Abstract: A data processing system including a data processor, also called a processing accelerator, processes at least one processor word each clock cycle. Each processor word includes multiple complete data samples which are received individually as part of a sequential stream of logically adjacent or related data samples such as in image data pixels which are part of an image to be processed by a machine vision system. A predetermined number of the data samples are stored together, as a processor word, in dedicated processing accelerator memory. For example, four 8 bit data samples can be stored together as one 32 bit processor word. The system also includes a data aligner which allows the processing accelerator to process at least one processor word comprised of at least one data sample from two processor words. The aligner controls data sample alignment such as for example, pixel alignment in the case of a vision system, to facilitate image data processing.