Patents by Inventor Michael R. D'Amour

Michael R. D'Amour has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6842729
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system a network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: January 11, 2005
    Assignee: Quickturn Design Systems, Inc.
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne
  • Publication number: 20020107682
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system. a network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Application
    Filed: March 26, 2002
    Publication date: August 8, 2002
    Applicant: Quickturn Design Systems, Inc.
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne
  • Patent number: 6377911
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system. A network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: April 23, 2002
    Assignee: Quickturn Design Systems, Inc.
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne
  • Patent number: 5963735
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system. A network or internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: October 5, 1999
    Assignee: Quickturn Design Systems, Inc.
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne
  • Patent number: 5644515
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system. A network or internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 1, 1997
    Assignee: Quickturn Design Systems, Inc.
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne
  • Patent number: 5477475
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system. a network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Grant
    Filed: July 11, 1994
    Date of Patent: December 19, 1995
    Assignee: Quickturn Design Systems, Inc.
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne
  • Patent number: 5329470
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system a network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Grant
    Filed: December 21, 1993
    Date of Patent: July 12, 1994
    Assignee: Quickturn Systems, Inc.
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne
  • Patent number: 5109353
    Abstract: A system for physical emulation of electronic circuits or systems includes a data entry workstation where a user may input data representing the circuit or system configuration. This data is converted to a form suitable for programming an array of programmable gate elements provided with a richly interconnected architecture. Provision is made for externally connecting VLSI devices or other portions of a user's circuit or system. A network of internal probing interconnections is made available by utilization of unused circuit paths in the programmable gate arrays.
    Type: Grant
    Filed: December 2, 1988
    Date of Patent: April 28, 1992
    Assignee: Quickturn Systems, Incorporated
    Inventors: Stephen P. Sample, Michael R. D'Amour, Thomas S. Payne