Abstract: A leadless integrated circuit chip carrier apparatus and method of assembly to a printed circuit board. A plurality of castellations are provided in the perimeter walls of the carrier member and solder preforms are deformably fitted in the castellations for reflow vapor phase soldering to the printed circuit board. A spacer member is disposed between the carrier member and the printed circuit board and has a thermal coefficient of expansion matched to that of the solder. The spacer includes a high thermal conductivity planar metal portion sandwiched between an adhesive epoxy layer which facilitates assembly of the carrier to the circuit board.

Abstract: The invention is a method for interconnecting close lead center integrated ircuit package to boards by forming the leads as follows: (1) bonding the lead frame material to a thin insulating film, and the (2) forming the leads. Next, the film base is removed selectively where connections to the package and board will be made. The lead material is then plated and formed to provide stress relief in the package-to-board interconnect. The lead frame is then attached to the package and board.