Abstract: An apparatus for testing of multiple disks in a disk drive, and a method for testing utilizing the apparatus. Disks in a disk stack have associated read/write heads, and multiple read/write heads are controlled by read/write controllers. The controllers are controlled by chip select lines, and the read/write heads are selected via a head select bus. The disk stack is rotated by means of a motor or other rotation mechanism, and data is written onto tracks on surfaces of the disks by means of the read/write heads. A given head is selected by selecting its associated controller, and selecting the head code for that particular head. Multiple controllers may be selected at one time, with one head per controller engaged for the write function at a given time, such that several heads may be written at a time for speeding up the write proces in a disk testing procedure. In an alternative embodiment, several heads may be accessed per controller at one time.

Abstract: A method and apparatus for increasing the throughput of memory disk drive quality control testing. The apparatus consists of a delay line for delaying the input signal from the read circuitry by one period of said input signal. A difference amplifier subtracts the delayed input signal from the undelayed input signal and couples the difference to one input of a comparator. The comparator compares the difference signal to a threshold used to indicate the presence of an "additional pulse". This test is performed simultaneously with a "missing pulse" test. The method involves delaying the input signal by one period and subtracting the delayed signal from the undelayed signal. A comparison of the difference to a predetermined threshold is then performed and where the threshold is exceeded, the corresponding location on the track under test is recorded as a probable defect. This method is performed simultaneously with a conventional method of performing a "missing pulse" test.

Abstract: A signal detector whose output voltage approximates the true average to peak value of an applied signal of a generally arbitrary waveform employs current sources to regulate the charge-discharge duty cycle of an integrating storage device. The integrating storage device, such as an integrating capacitor, is employed in a high gain circuit with negative feedback to develop a signal representative of the peak level of the applied signal. The device approaches true peak detection over a wide dynamic and frequency operating range relative to known prior art at peak detection devices.

Abstract: An LC-type oscillator employing a differential amplifier to switch a tank circuit in response to a feedback signal. A voltage controlled variable capacitor is employed to control the frequency of oscillation. The bias across the variable capacitor is closely controlled to avoid errors in the frequency of oscillation during the period of startup, which would otherwise create an undesired error in the oscillation frequency.