Abstract: A bus analyzer system comprises an input buffers module, a data memory module, a control detection module, a link request registers module, and a computer interface. The input buffers module is configured to receive data signals from a plurality of serial data, control, and clock lines at an interface between a physical layer and a link layer of an IEEE-1394 bus device. The computer interface is configured for operative communication with a computer that stores application software having algorithms for carrying out instructions for data interleaving, data formatting, error detection, time tracking, and display. The bus analyzer system allows a user to view all activity at the interface between the link layer and the physical layer within any IEEE-1394 bus device. The bus analyzer system automates the process of capturing each of the high speed serial data or control streams, and reconstructs, displays, and time-stamps the properly formatted 1394 transaction, data, or command signals.