Patents by Inventor Michael Rentschler

Michael Rentschler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11876616
    Abstract: Various examples relate to a wired local area network (WLAN) including a shared transmission medium. An apparatus includes a beacon counter and an operational mode controller. The beacon counter is operably coupled to a line of a shared transmission medium of a wired local area network. The beacon counter is to count beacon signals on the line and determine a beacon count over a predetermined time period, or a beacon rate of the beacon signals. The operational mode controller is to control the apparatus to take over operation as a master node of the wired local area network based, at least in part, on a maximum bus cycle length of bus cycles on the line and responsive to the beacon count or the beacon rate.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: January 16, 2024
    Assignee: Microchip Technology Incorporated
    Inventors: Michael Rentschler, Martin Miller, Thorben Link, Venkat Iyer
  • Publication number: 20220368451
    Abstract: Various examples relate to a wired local area network (WLAN) including a shared transmission medium. An apparatus includes a beacon counter and an operational mode controller. The beacon counter is operably coupled to a line of a shared transmission medium of a wired local area network. The beacon counter is to count beacon signals on the line and determine a beacon count over a predetermined time period, or a beacon rate of the beacon signals. The operational mode controller is to control the apparatus to take over operation as a master node of the wired local area network based, at least in part, on a maximum bus cycle length of bus cycles on the line and responsive to the beacon count or the beacon rate.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Michael Rentschler, Martin Miller, Thorben Link, Venkatraman Iyer
  • Patent number: 11405127
    Abstract: Various embodiments relate to a wired local area network (WLAN) including a shared transmission medium (e.g., a 10SPE network). A method may include detecting an event in a WLAN including physical level collision avoidance (PLCA). The method may also include disabling a beacon of a first node operating as a master of the WLAN in response to the event. Further, the method may include enabling a second node to operate as the master of the WLAN.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: August 2, 2022
    Assignee: Microchip Technology Incorporated
    Inventors: Michael Rentschler, Martin Miller, Thorben Link, Venkatraman Iyer
  • Patent number: 11398925
    Abstract: Disclosed embodiments relate, generally, to traffic shaping at a network segment having a shared bus. Some embodiments relate to performing aspects of the traffic shaping at a physical layer device. In some cases, transmit timeslot signaling may be tuned at a physical layer device to create transmit timeslots that are aligned with the traffic shaping profile.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: July 26, 2022
    Assignee: Microchip Technology Incorporated
    Inventors: Michael Rentschler, Venkatraman Iyer
  • Publication number: 20220095377
    Abstract: Various embodiments relate to wired local area networks. A method may include detecting, at a node in a wired local area network, at least one event. A physical layer device of the network node is configured to implement a physical level collision avoidance (PLCA) sublayer. The at least one event may include at least one of an amount of data stored in a first-in-first-out (FIFO) buffer of the node being at least a threshold amount, and a received packet being a precision time protocol (PTP) packet incurring variable delay. The method may further include emulating a collision at the node in response to the at least one detected event.
    Type: Application
    Filed: December 2, 2021
    Publication date: March 24, 2022
    Inventors: Venkatraman Iyer, Dixon Chen, John Junling Zang, Michael Rentschler
  • Publication number: 20220013149
    Abstract: Synchronization for audio systems and related systems and circuitry are disclosed. An audio system includes a word select line of a digital audio interface, a serial clock line of the digital audio interface, and hardware circuitry. The hardware circuitry is configured to provide a word select signal to the word select line and a serial clock signal to the serial clock line. The word select signal is configured to indicate channels of a serial data signal provided to a serial data line of the digital audio interface. The hardware circuitry is also configured to synchronize the serial clock signal to a clock reference stream of an audio stream communicated via a network interface.
    Type: Application
    Filed: July 9, 2021
    Publication date: January 13, 2022
    Inventors: Michael Rentschler, Thorben Link
  • Patent number: 11197322
    Abstract: Various embodiments relate to wired local area networks. A method may include detecting, at a node in a wired local area network, at least one event. A physical layer device of the network node is configured to implement a physical level collision avoidance (PLCA) sublayer. The at least one event may include at least one of an amount of data stored in a first-in-first-out (FIFO) buffer of the node being at least a threshold amount, and a received packet being a precision time protocol (PTP) packet incurring variable delay. The method may further include emulating a collision at the node in response to the at least one detected event.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: December 7, 2021
    Assignee: Microchip Technology Incorporated
    Inventors: Venkatraman Iyer, Dixon Chen, John Junling Zang, Michael Rentschler
  • Patent number: 11050501
    Abstract: A microcontroller includes a packet matching circuit, a hardware timer circuit, and a processor. The packet matching circuit is configured to match contents of received packets to the microcontroller and identify whether a packet has been received. The hardware timer circuit is configured to provide a synchronization timestamp based on a signal from the packet matching circuit that a synchronization packet has been matched, and provide a follow-up timestamp based on a signal from the packet matching circuit that a follow-up packet has been matched after reception of the synchronization packet. The processor is configured to adjust a clock base to determine a synchronized clock base based upon the synchronization timestamp and upon the follow-up timestamp.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: June 29, 2021
    Assignee: Microchip Technology Incorporated
    Inventor: Michael Rentschler
  • Patent number: 10868765
    Abstract: A 10SPE network node includes a processor, a memory, instructions in the memory configured to cause the processor to generate data to be sent to other nodes, and a network stack. The network stack includes circuitry configured to delay transmission of data in a sending slot in a transmission cycle on a 10SPE network based upon a bandwidth sharing scheme.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: December 15, 2020
    Assignee: MICROCHIP TECHNOLOGY INCORPORATED
    Inventors: Bernd Sostawa, Martin Miller, Michael Rentschler, Venkatraman Iyer
  • Publication number: 20200351119
    Abstract: Disclosed embodiments relate, generally, to traffic shaping at a network segment having a shared bus. Some embodiments relate to performing aspects of the traffic shaping at a physical layer device. In some cases, transmit timeslot signaling may be tuned at a physical layer device to create transmit timeslots that are aligned with the traffic shaping profile.
    Type: Application
    Filed: November 5, 2019
    Publication date: November 5, 2020
    Inventors: Michael Rentschler, Venkat Iyer
  • Publication number: 20200351943
    Abstract: Various embodiments relate to wired local area networks. A method may include detecting, at a node in a wired local area network at least one event. A physical layer device of the network node is configured to implement a physical level collision avoidance (PLCA) sublayer. The at least one event may include at least one of an amount of data stored in a first-in-first-out (FIFO) buffer of the node being at least a threshold amount, and a received packet being a precision time protocol (PTP) packet incurring variable delay. The method may further include emulating a collision at the node in response to the at least one detected event.
    Type: Application
    Filed: April 8, 2020
    Publication date: November 5, 2020
    Inventors: Venkat Iyer, Dixon Chen, John Junling Zang, Michael Rentschler
  • Publication number: 20200343993
    Abstract: Various embodiments relate to a wired local area network (WLAN) including a shared transmission medium (e.g., a 10SPE network). A method may include detecting an event in a WLAN including physical level collision avoidance (PLCA). The method may also include disabling a beacon of a first node operating as a master of the WLAN in response to the event. Further, the method may include enabling a second node to operate as the master of the WLAN.
    Type: Application
    Filed: January 22, 2020
    Publication date: October 29, 2020
    Inventors: Michael Rentschler, Martin Miller, Thorben Link, Venkat Iyer
  • Publication number: 20190386763
    Abstract: A microcontroller includes a packet matching circuit, a hardware timer circuit, and a processor. The packet matching circuit is configured to match contents of received packets to the microcontroller and identify whether a packet has been received. The hardware timer circuit is configured to provide a synchronization timestamp based on a signal from the packet matching circuit that a synchronization packet has been matched, and provide a follow-up timestamp based on a signal from the packet matching circuit that a follow-up packet has been matched after reception of the synchronization packet. The processor is configured to adjust a clock base to determine a synchronized clock base based upon the synchronization timestamp and upon the follow-up timestamp.
    Type: Application
    Filed: June 13, 2019
    Publication date: December 19, 2019
    Applicant: Microchip Technology Incorporated
    Inventor: Michael Rentschler
  • Publication number: 20190363991
    Abstract: A 10SPE network node includes a processor, a memory, instructions in the memory configured to cause the processor to generate data to be sent to other nodes, and a network stack. The network stack includes circuitry configured to delay transmission of data in a sending slot in a transmission cycle on a 10SPE network based upon a bandwidth sharing scheme.
    Type: Application
    Filed: November 8, 2018
    Publication date: November 28, 2019
    Applicant: Microchip Technology Incorporated
    Inventors: Bernd Sostawa, Martin Miller, Michael Rentschler, Venkatraman Iyer
  • Publication number: 20060008133
    Abstract: A glass container inspection machine is disclosed for inspecting glass stippled bottles for defects. Stippled bottles are supported at an inspection station and are illuminated with a light source. The stippled bottle is imaged a pixel matrix with the pixels of the image varying in intensity from bright to gray at the points of stippling. A computer evaluates the pixels of the image including a look up table for values to be assigned to specific light intensities from light to black, the plot of the look up table having a high gain portion from black to gray and a continuous low gain portion from gray to white.
    Type: Application
    Filed: July 2, 2004
    Publication date: January 12, 2006
    Inventors: Joe Dordoni, Sarath Tennakoon, Michael Rentschler, Richard Diehr, Kee Loo